ASoC: Intel: Skylake: Update pcm capability

This patch adds pcm capability to support 16/8k rates and 32 bit formats

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jeeja KP 2015-11-23 22:26:26 +05:30 committed by Mark Brown
parent 98256f83d2
commit 06b23d9379
1 changed files with 6 additions and 3 deletions

View File

@ -39,9 +39,12 @@ static struct snd_pcm_hardware azx_pcm_hw = {
SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
SNDRV_PCM_INFO_HAS_LINK_ATIME |
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.rates = SNDRV_PCM_RATE_48000,
.rate_min = 48000,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S32_LE |
SNDRV_PCM_FMTBIT_S24_LE,
.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
SNDRV_PCM_RATE_8000,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 2,
.channels_max = 2,