wcn36xx: Remove warning message when dev is NULL for arm64 dma_alloc.
arm64 has requirement that all the dma operations have actual device. Otherwise, following warnning message shown and dma allocation fails: WARNING: CPU: 0 PID: 954 at arch/arm64/mm/dma-mapping.c:106 __dma_alloc+0x24c/0x258() Use an actual device structure for DMA allocation Modules linked in: wcn36xx wcn36xx_platform CPU: 0 PID: 954 Comm: ifconfig Not tainted 4.0.0+ #14 Hardware name: Qualcomm Technologies, Inc. MSM 8916 MTP (DT) Call trace: [<ffffffc000089904>] dump_backtrace+0x0/0x124 [<ffffffc000089a38>] show_stack+0x10/0x1c [<ffffffc000627114>] dump_stack+0x80/0xc4 [<ffffffc0000b2e64>] warn_slowpath_common+0x98/0xd0 [<ffffffc0000b2ee8>] warn_slowpath_fmt+0x4c/0x58 [<ffffffc00009487c>] __dma_alloc+0x248/0x258 [<ffffffbffc009270>] wcn36xx_dxe_allocate_mem_pools+0xc4/0x108 [wcn36xx] [<ffffffbffc0079c4>] wcn36xx_start+0x38/0x240 [wcn36xx] [<ffffffc0005f161c>] ieee80211_do_open+0x1b0/0x9a4 [<ffffffc0005f1e68>] ieee80211_open+0x58/0x68 [<ffffffc00051693c>] __dev_open+0xb0/0x120 [<ffffffc000516c10>] __dev_change_flags+0x88/0x150 [<ffffffc000516cf4>] dev_change_flags+0x1c/0x5c [<ffffffc000570950>] devinet_ioctl+0x644/0x6f0 Signed-off-by: Yin, Fengwei <fengwei.yin@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
yfw
Kalle Valo
parent
8e8e54c490
commit
072255241d
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@ -170,7 +170,7 @@ void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn)
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wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch);
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}
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static int wcn36xx_dxe_init_descs(struct wcn36xx_dxe_ch *wcn_ch)
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static int wcn36xx_dxe_init_descs(struct device *dev, struct wcn36xx_dxe_ch *wcn_ch)
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{
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struct wcn36xx_dxe_desc *cur_dxe = NULL;
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struct wcn36xx_dxe_desc *prev_dxe = NULL;
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@ -179,7 +179,7 @@ static int wcn36xx_dxe_init_descs(struct wcn36xx_dxe_ch *wcn_ch)
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int i;
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size = wcn_ch->desc_num * sizeof(struct wcn36xx_dxe_desc);
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wcn_ch->cpu_addr = dma_alloc_coherent(NULL, size, &wcn_ch->dma_addr,
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wcn_ch->cpu_addr = dma_alloc_coherent(dev, size, &wcn_ch->dma_addr,
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GFP_KERNEL);
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if (!wcn_ch->cpu_addr)
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return -ENOMEM;
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@ -271,7 +271,7 @@ static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)
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return 0;
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}
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static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl)
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static int wcn36xx_dxe_fill_skb(struct device *dev, struct wcn36xx_dxe_ctl *ctl)
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{
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struct wcn36xx_dxe_desc *dxe = ctl->desc;
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struct sk_buff *skb;
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@ -280,7 +280,7 @@ static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl)
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if (skb == NULL)
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return -ENOMEM;
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dxe->dst_addr_l = dma_map_single(NULL,
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dxe->dst_addr_l = dma_map_single(dev,
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skb_tail_pointer(skb),
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WCN36XX_PKT_SIZE,
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DMA_FROM_DEVICE);
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@ -298,7 +298,7 @@ static int wcn36xx_dxe_ch_alloc_skb(struct wcn36xx *wcn,
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cur_ctl = wcn_ch->head_blk_ctl;
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for (i = 0; i < wcn_ch->desc_num; i++) {
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wcn36xx_dxe_fill_skb(cur_ctl);
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wcn36xx_dxe_fill_skb(wcn->dev, cur_ctl);
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cur_ctl = cur_ctl->next;
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}
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@ -361,7 +361,7 @@ static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch)
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if (ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)
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break;
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if (ctl->skb) {
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dma_unmap_single(NULL, ctl->desc->src_addr_l,
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dma_unmap_single(wcn->dev, ctl->desc->src_addr_l,
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ctl->skb->len, DMA_TO_DEVICE);
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info = IEEE80211_SKB_CB(ctl->skb);
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if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) {
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@ -478,7 +478,7 @@ static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,
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while (!(dxe->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)) {
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skb = ctl->skb;
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dma_addr = dxe->dst_addr_l;
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wcn36xx_dxe_fill_skb(ctl);
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wcn36xx_dxe_fill_skb(wcn->dev, ctl);
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switch (ch->ch_type) {
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case WCN36XX_DXE_CH_RX_L:
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@ -495,7 +495,7 @@ static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,
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wcn36xx_warn("Unknown channel\n");
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}
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dma_unmap_single(NULL, dma_addr, WCN36XX_PKT_SIZE,
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dma_unmap_single(wcn->dev, dma_addr, WCN36XX_PKT_SIZE,
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DMA_FROM_DEVICE);
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wcn36xx_rx_skb(wcn, skb);
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ctl = ctl->next;
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@ -544,7 +544,7 @@ int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)
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16 - (WCN36XX_BD_CHUNK_SIZE % 8);
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s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H;
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cpu_addr = dma_alloc_coherent(NULL, s, &wcn->mgmt_mem_pool.phy_addr,
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cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->mgmt_mem_pool.phy_addr,
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GFP_KERNEL);
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if (!cpu_addr)
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goto out_err;
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@ -559,7 +559,7 @@ int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)
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16 - (WCN36XX_BD_CHUNK_SIZE % 8);
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s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L;
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cpu_addr = dma_alloc_coherent(NULL, s, &wcn->data_mem_pool.phy_addr,
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cpu_addr = dma_alloc_coherent(wcn->dev, s, &wcn->data_mem_pool.phy_addr,
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GFP_KERNEL);
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if (!cpu_addr)
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goto out_err;
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@ -578,13 +578,13 @@ int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)
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void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn)
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{
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if (wcn->mgmt_mem_pool.virt_addr)
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dma_free_coherent(NULL, wcn->mgmt_mem_pool.chunk_size *
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dma_free_coherent(wcn->dev, wcn->mgmt_mem_pool.chunk_size *
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WCN36XX_DXE_CH_DESC_NUMB_TX_H,
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wcn->mgmt_mem_pool.virt_addr,
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wcn->mgmt_mem_pool.phy_addr);
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if (wcn->data_mem_pool.virt_addr) {
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dma_free_coherent(NULL, wcn->data_mem_pool.chunk_size *
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dma_free_coherent(wcn->dev, wcn->data_mem_pool.chunk_size *
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WCN36XX_DXE_CH_DESC_NUMB_TX_L,
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wcn->data_mem_pool.virt_addr,
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wcn->data_mem_pool.phy_addr);
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@ -651,7 +651,7 @@ int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
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goto unlock;
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}
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desc->src_addr_l = dma_map_single(NULL,
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desc->src_addr_l = dma_map_single(wcn->dev,
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ctl->skb->data,
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ctl->skb->len,
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DMA_TO_DEVICE);
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@ -707,7 +707,7 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
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/***************************************/
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/* Init descriptors for TX LOW channel */
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/***************************************/
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wcn36xx_dxe_init_descs(&wcn->dxe_tx_l_ch);
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wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_l_ch);
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wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool);
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/* Write channel head to a NEXT register */
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@ -725,7 +725,7 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
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/***************************************/
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/* Init descriptors for TX HIGH channel */
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/***************************************/
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wcn36xx_dxe_init_descs(&wcn->dxe_tx_h_ch);
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wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_h_ch);
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wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool);
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/* Write channel head to a NEXT register */
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@ -745,7 +745,7 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
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/***************************************/
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/* Init descriptors for RX LOW channel */
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/***************************************/
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wcn36xx_dxe_init_descs(&wcn->dxe_rx_l_ch);
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wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_l_ch);
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/* For RX we need to preallocated buffers */
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wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch);
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@ -775,7 +775,7 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
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/***************************************/
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/* Init descriptors for RX HIGH channel */
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/***************************************/
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wcn36xx_dxe_init_descs(&wcn->dxe_rx_h_ch);
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wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_h_ch);
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/* For RX we need to prealocat buffers */
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wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch);
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