drm/ast: Try to use MMIO registers when PIO isn't supported
If the PIO resources haven't been assigned, then we have no choice but try to use the MMIO version. This is the case for example on POWER8 which doesn't support PIO at all. Chips rev 0x20 or later have MMIO decoding enabled by default. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -125,8 +125,9 @@ struct ast_gem_object;
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#define AST_IO_AR_PORT_WRITE (0x40)
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#define AST_IO_MISC_PORT_WRITE (0x42)
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#define AST_IO_VGA_ENABLE_PORT (0x43)
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#define AST_IO_SEQ_PORT (0x44)
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#define AST_DAC_INDEX_READ (0x3c7)
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#define AST_IO_DAC_INDEX_READ (0x47)
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#define AST_IO_DAC_INDEX_WRITE (0x48)
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#define AST_IO_DAC_DATA (0x49)
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#define AST_IO_GR_PORT (0x4E)
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@ -134,6 +135,8 @@ struct ast_gem_object;
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#define AST_IO_INPUT_STATUS1_READ (0x5A)
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#define AST_IO_MISC_PORT_READ (0x4C)
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#define AST_IO_MM_OFFSET (0x380)
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#define __ast_read(x) \
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static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
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u##x val = 0;\
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@ -359,10 +359,24 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
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ret = -EIO;
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goto out_free;
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}
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ast->ioregs = pci_iomap(dev->pdev, 2, 0);
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/*
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* If we don't have IO space at all, use MMIO now and
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* assume the chip has MMIO enabled by default (rev 0x20
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* and higher).
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*/
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if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
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DRM_INFO("platform has no IO space, trying MMIO\n");
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ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
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}
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/* "map" IO regs if the above hasn't done so already */
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if (!ast->ioregs) {
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ret = -EIO;
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goto out_free;
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ast->ioregs = pci_iomap(dev->pdev, 2, 0);
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if (!ast->ioregs) {
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ret = -EIO;
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goto out_free;
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}
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}
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ast_detect_chip(dev);
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