mtd: nand: omap2: Implement NAND ready using gpiolib
The GPMC WAIT pin status are now available over gpiolib. Update the omap_dev_ready() function to use gpio instead of directly accessing GPMC register space. Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Tony Lindgren <tony@atomide.com>
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@ -48,6 +48,7 @@ Optional properties:
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locating ECC errors for BCHx algorithms. SoC devices which have
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ELM hardware engines should specify this device node in .dtsi
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Using ELM for ECC error correction frees some CPU cycles.
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- rb-gpios: GPIO specifier for the ready/busy# pin.
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For inline partition table parsing (optional):
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@ -78,6 +79,7 @@ Example for an AM33xx board:
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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ti,nand-xfer-type = "polled";
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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@ -12,6 +12,7 @@
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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@ -182,6 +183,8 @@ struct omap_nand_info {
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struct nand_ecclayout oobinfo;
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/* fields specific for BCHx_HW ECC scheme */
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struct device *elm_dev;
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/* NAND ready gpio */
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struct gpio_desc *ready_gpiod;
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};
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static inline struct omap_nand_info *mtd_to_omap(struct mtd_info *mtd)
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@ -1023,21 +1026,16 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
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}
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/**
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* omap_dev_ready - calls the platform specific dev_ready function
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* omap_dev_ready - checks the NAND Ready GPIO line
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* @mtd: MTD device structure
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*
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* Returns true if ready and false if busy.
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*/
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static int omap_dev_ready(struct mtd_info *mtd)
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{
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unsigned int val = 0;
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struct omap_nand_info *info = mtd_to_omap(mtd);
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val = readl(info->reg.gpmc_status);
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if ((val & 0x100) == 0x100) {
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return 1;
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} else {
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return 0;
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}
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return gpiod_get_value(info->ready_gpiod);
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}
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/**
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@ -1755,7 +1753,9 @@ static int omap_nand_probe(struct platform_device *pdev)
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info->gpmc_cs = pdata->cs;
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info->reg = pdata->reg;
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info->ecc_opt = pdata->ecc_opt;
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info->dev_ready = pdata->dev_ready;
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if (pdata->dev_ready)
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dev_info(&pdev->dev, "pdata->dev_ready is deprecated\n");
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info->xfer_type = pdata->xfer_type;
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info->devsize = pdata->devsize;
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info->elm_of_node = pdata->elm_of_node;
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@ -1787,6 +1787,13 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->IO_ADDR_W = nand_chip->IO_ADDR_R;
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nand_chip->cmd_ctrl = omap_hwcontrol;
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info->ready_gpiod = devm_gpiod_get_optional(&pdev->dev, "rb",
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GPIOD_IN);
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if (IS_ERR(info->ready_gpiod)) {
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dev_err(dev, "failed to get ready gpio\n");
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return PTR_ERR(info->ready_gpiod);
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}
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/*
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* If RDY/BSY line is connected to OMAP then use the omap ready
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* function and the generic nand_wait function which reads the status
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@ -1794,7 +1801,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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* chip delay which is slightly more than tR (AC Timing) of the NAND
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* device and read status register until you get a failure or success
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*/
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if (info->dev_ready) {
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if (info->ready_gpiod) {
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nand_chip->dev_ready = omap_dev_ready;
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nand_chip->chip_delay = 0;
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} else {
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@ -71,7 +71,6 @@ struct omap_nand_platform_data {
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int cs;
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struct mtd_partition *parts;
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int nr_parts;
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bool dev_ready;
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bool flash_bbt;
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enum nand_io xfer_type;
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int devsize;
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@ -82,5 +81,6 @@ struct omap_nand_platform_data {
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/* deprecated */
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struct gpmc_nand_regs reg;
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struct device_node *of_node;
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bool dev_ready;
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};
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#endif
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