drm/amdgpu: Clear HDP_MISC_CNTL.HDP_FLUSH_INVALIDATE_CACHE
So that we can invalidate and flush the HDP independently Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -339,7 +339,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
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WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK);
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tmp = RREG32(mmHDP_MISC_CNTL);
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tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1);
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tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0);
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WREG32(mmHDP_MISC_CNTL, tmp);
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tmp = RREG32(mmHDP_HOST_PATH_CNTL);
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@ -386,7 +386,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
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WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK);
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tmp = RREG32(mmHDP_MISC_CNTL);
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tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1);
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tmp = REG_SET_FIELD(tmp, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 0);
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WREG32(mmHDP_MISC_CNTL, tmp);
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tmp = RREG32(mmHDP_HOST_PATH_CNTL);
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