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MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REV 

Remove the need to check that __mips_isa_rev is defined by using the
newly added MIPS_ISA_REV.

Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18677/
Signed-off-by: James Hogan <jhogan@kernel.org>
This commit is contained in:
Matt Redfearn 2018-02-26 17:02:44 +00:00 committed by James Hogan
parent 18ba210a29
commit 13b8638ba0
No known key found for this signature in database
GPG Key ID: 6C0B6993DE38767A
1 changed files with 5 additions and 4 deletions
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9
arch/mips/net/bpf_jit_asm.S
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@ -11,6 +11,7 @@
*/ */
#include <asm/asm.h> #include <asm/asm.h>
#include <asm/isa-rev.h>
#include <asm/regdef.h> #include <asm/regdef.h>
#include "bpf_jit.h" #include "bpf_jit.h"
@ -65,7 +66,7 @@ FEXPORT(sk_load_word_positive)
lw $r_A, 0(t1) lw $r_A, 0(t1)
.set noreorder .set noreorder
#ifdef CONFIG_CPU_LITTLE_ENDIAN #ifdef CONFIG_CPU_LITTLE_ENDIAN
# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) # if MIPS_ISA_REV >= 2
wsbh t0, $r_A wsbh t0, $r_A
rotr $r_A, t0, 16 rotr $r_A, t0, 16
# else # else
@ -92,7 +93,7 @@ FEXPORT(sk_load_half_positive)
PTR_ADDU t1, $r_skb_data, offset PTR_ADDU t1, $r_skb_data, offset
lhu $r_A, 0(t1) lhu $r_A, 0(t1)
#ifdef CONFIG_CPU_LITTLE_ENDIAN #ifdef CONFIG_CPU_LITTLE_ENDIAN
# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) # if MIPS_ISA_REV >= 2
wsbh $r_A, $r_A wsbh $r_A, $r_A
# else # else
sll t0, $r_A, 8 sll t0, $r_A, 8
@ -170,7 +171,7 @@ FEXPORT(sk_load_byte_positive)
NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp) NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
bpf_slow_path_common(4) bpf_slow_path_common(4)
#ifdef CONFIG_CPU_LITTLE_ENDIAN #ifdef CONFIG_CPU_LITTLE_ENDIAN
# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) # if MIPS_ISA_REV >= 2
wsbh t0, $r_s0 wsbh t0, $r_s0
jr $r_ra jr $r_ra
rotr $r_A, t0, 16 rotr $r_A, t0, 16
@ -196,7 +197,7 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp) NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
bpf_slow_path_common(2) bpf_slow_path_common(2)
#ifdef CONFIG_CPU_LITTLE_ENDIAN #ifdef CONFIG_CPU_LITTLE_ENDIAN
# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) # if MIPS_ISA_REV >= 2
jr $r_ra jr $r_ra
wsbh $r_A, $r_s0 wsbh $r_A, $r_s0
# else # else