drm/amdgpu: remove the VI hardware semaphore in ring sync
Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@ -3783,11 +3783,10 @@ static bool gfx_v8_0_ring_emit_semaphore(struct amdgpu_ring *ring,
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unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL;
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if (ring->adev->asic_type == CHIP_TOPAZ ||
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ring->adev->asic_type == CHIP_TONGA) {
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amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));
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amdgpu_ring_write(ring, lower_32_bits(addr));
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amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel);
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} else {
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ring->adev->asic_type == CHIP_TONGA)
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/* we got a hw semaphore bug in VI TONGA, return false to switch back to sw fence wait */
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return false;
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else {
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amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 2));
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amdgpu_ring_write(ring, lower_32_bits(addr));
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amdgpu_ring_write(ring, upper_32_bits(addr));
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