mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision
Latest datasheet makes it clear that not all ES revisions of the H3 and M3-W have the 4-tap HS400 mode quirk, currently the quirk is set unconditionally for these two SoCs. Prepare to handle the quirk based on SoC revision instead of compatibility value by using soc_device_match() and set the TMIO_MMC_HAVE_4TAP_HS400 flag explicitly. The reason for adding a new quirks struct instead of just a flag is that looking ahead it seems more quirks needs to be handled in a SoC revision basis. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -32,6 +32,7 @@
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/pinctrl-state.h>
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#include <linux/pinctrl/pinctrl-state.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sys_soc.h>
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#include "renesas_sdhi.h"
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#include "renesas_sdhi.h"
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#include "tmio_mmc.h"
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#include "tmio_mmc.h"
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@ -45,6 +46,10 @@
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#define SDHI_VER_GEN3_SD 0xcc10
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#define SDHI_VER_GEN3_SD 0xcc10
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#define SDHI_VER_GEN3_SDMMC 0xcd10
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#define SDHI_VER_GEN3_SDMMC 0xcd10
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struct renesas_sdhi_quirks {
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bool hs400_4taps;
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};
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static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
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static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
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{
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{
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u32 val;
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u32 val;
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@ -597,11 +602,25 @@ static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
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renesas_sdhi_sdbuf_width(host, enable ? width : 16);
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renesas_sdhi_sdbuf_width(host, enable ? width : 16);
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}
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}
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static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
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.hs400_4taps = true,
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};
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static const struct soc_device_attribute sdhi_quirks_match[] = {
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{ .soc_id = "r8a7795", .revision = "ES1.*", .data = &sdhi_quirks_4tap },
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{ .soc_id = "r8a7795", .revision = "ES2.0", .data = &sdhi_quirks_4tap },
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{ .soc_id = "r8a7796", .revision = "ES1.0", .data = &sdhi_quirks_4tap },
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{ .soc_id = "r8a7796", .revision = "ES1.1", .data = &sdhi_quirks_4tap },
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{ /* Sentinel. */ },
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};
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int renesas_sdhi_probe(struct platform_device *pdev,
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int renesas_sdhi_probe(struct platform_device *pdev,
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const struct tmio_mmc_dma_ops *dma_ops)
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const struct tmio_mmc_dma_ops *dma_ops)
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{
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{
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struct tmio_mmc_data *mmd = pdev->dev.platform_data;
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struct tmio_mmc_data *mmd = pdev->dev.platform_data;
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const struct renesas_sdhi_quirks *quirks = NULL;
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const struct renesas_sdhi_of_data *of_data;
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const struct renesas_sdhi_of_data *of_data;
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const struct soc_device_attribute *attr;
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struct tmio_mmc_data *mmc_data;
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struct tmio_mmc_data *mmc_data;
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struct tmio_mmc_dma *dma_priv;
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struct tmio_mmc_dma *dma_priv;
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struct tmio_mmc_host *host;
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struct tmio_mmc_host *host;
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@ -611,6 +630,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
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of_data = of_device_get_match_data(&pdev->dev);
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of_data = of_device_get_match_data(&pdev->dev);
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attr = soc_device_match(sdhi_quirks_match);
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if (attr)
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quirks = attr->data;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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if (!res)
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return -EINVAL;
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return -EINVAL;
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@ -676,6 +699,9 @@ int renesas_sdhi_probe(struct platform_device *pdev,
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host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
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host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
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host->dma_ops = dma_ops;
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host->dma_ops = dma_ops;
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if (quirks && quirks->hs400_4taps)
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mmc_data->flags |= TMIO_MMC_HAVE_4TAP_HS400;
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/* For some SoC, we disable internal WP. GPIO may override this */
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/* For some SoC, we disable internal WP. GPIO may override this */
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if (mmc_can_gpio_ro(host->mmc))
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if (mmc_can_gpio_ro(host->mmc))
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mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
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mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
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