csky: Fixup msa highest 3 bits mask

Just as comment mentioned, the msa format:

 cr<30/31, 15> MSA register format:
 31 - 29 | 28 - 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
   BA     Reserved  SH  WA  B   SO SEC  C   D   V

So we should shift 29 bits not 28 bits for mask

Signed-off-by: Liu Yibin <jiulong@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
This commit is contained in:
Liu Yibin 2020-04-21 15:56:28 +08:00 committed by Guo Ren
parent c2e59d1f4d
commit 165f2d2858
2 changed files with 4 additions and 4 deletions

View File

@ -167,8 +167,8 @@
* BA Reserved C D V * BA Reserved C D V
*/ */
cprcr r6, cpcr30 cprcr r6, cpcr30
lsri r6, 28 lsri r6, 29
lsli r6, 28 lsli r6, 29
addi r6, 0xe addi r6, 0xe
cpwcr r6, cpcr30 cpwcr r6, cpcr30

View File

@ -285,8 +285,8 @@
*/ */
mfcr r6, cr<30, 15> /* Get MSA0 */ mfcr r6, cr<30, 15> /* Get MSA0 */
2: 2:
lsri r6, 28 lsri r6, 29
lsli r6, 28 lsli r6, 29
addi r6, 0x1ce addi r6, 0x1ce
mtcr r6, cr<30, 15> /* Set MSA0 */ mtcr r6, cr<30, 15> /* Set MSA0 */