PCI: designware: Ensure ATU is enabled before IO/conf space accesses
Read back the ATU CR2 register to ensure ATU programming is effective before any subsequent I/O or config space accesses. Without this, PCI device enumeration is unreliable. [bhelgaas: changelog, comment] Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
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@ -154,6 +154,8 @@ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
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static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
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int type, u64 cpu_addr, u64 pci_addr, u32 size)
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{
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u32 val;
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dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | index,
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PCIE_ATU_VIEWPORT);
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dw_pcie_writel_rc(pp, lower_32_bits(cpu_addr), PCIE_ATU_LOWER_BASE);
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@ -164,6 +166,12 @@ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
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dw_pcie_writel_rc(pp, upper_32_bits(pci_addr), PCIE_ATU_UPPER_TARGET);
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dw_pcie_writel_rc(pp, type, PCIE_ATU_CR1);
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dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
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/*
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* Make sure ATU enable takes effect before any subsequent config
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* and I/O accesses.
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*/
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dw_pcie_readl_rc(pp, PCIE_ATU_CR2, &val);
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}
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static struct irq_chip dw_msi_irq_chip = {
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