spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent calls
dw_spi_irq() and dw_spi_transfer_one concurrent calls. I find a panic in dw_writer(): txw = *(u8 *)(dws->tx), when dw->tx==null, dw->len==4, and dw->tx_end==1. When tpm driver's message overtime dw_spi_irq() and dw_spi_transfer_one may concurrent visit dw_spi, so I think dw_spi structure lack of protection. Otherwise dw_spi_transfer_one set dw rx/tx buffer and then open irq, store dw rx/tx instructions and other cores handle irq load dw rx/tx instructions may out of order. [ 1025.321302] Call trace: ... [ 1025.321319] __crash_kexec+0x98/0x148 [ 1025.321323] panic+0x17c/0x314 [ 1025.321329] die+0x29c/0x2e8 [ 1025.321334] die_kernel_fault+0x68/0x78 [ 1025.321337] __do_kernel_fault+0x90/0xb0 [ 1025.321346] do_page_fault+0x88/0x500 [ 1025.321347] do_translation_fault+0xa8/0xb8 [ 1025.321349] do_mem_abort+0x68/0x118 [ 1025.321351] el1_da+0x20/0x8c [ 1025.321362] dw_writer+0xc8/0xd0 [ 1025.321364] interrupt_transfer+0x60/0x110 [ 1025.321365] dw_spi_irq+0x48/0x70 ... Signed-off-by: wuxu.wu <wuxu.wu@huawei.com> Link: https://lore.kernel.org/r/1577849981-31489-1-git-send-email-wuxu.wu@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -172,9 +172,11 @@ static inline u32 rx_max(struct dw_spi *dws)
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static void dw_writer(struct dw_spi *dws)
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{
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u32 max = tx_max(dws);
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u32 max;
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u16 txw = 0;
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spin_lock(&dws->buf_lock);
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max = tx_max(dws);
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while (max--) {
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/* Set the tx word if the transfer's original "tx" is not null */
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if (dws->tx_end - dws->len) {
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@ -186,13 +188,16 @@ static void dw_writer(struct dw_spi *dws)
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dw_write_io_reg(dws, DW_SPI_DR, txw);
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dws->tx += dws->n_bytes;
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}
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spin_unlock(&dws->buf_lock);
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}
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static void dw_reader(struct dw_spi *dws)
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{
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u32 max = rx_max(dws);
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u32 max;
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u16 rxw;
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spin_lock(&dws->buf_lock);
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max = rx_max(dws);
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while (max--) {
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rxw = dw_read_io_reg(dws, DW_SPI_DR);
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/* Care rx only if the transfer's original "rx" is not null */
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@ -204,6 +209,7 @@ static void dw_reader(struct dw_spi *dws)
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}
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dws->rx += dws->n_bytes;
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}
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spin_unlock(&dws->buf_lock);
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}
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static void int_error_stop(struct dw_spi *dws, const char *msg)
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@ -276,18 +282,20 @@ static int dw_spi_transfer_one(struct spi_controller *master,
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{
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struct dw_spi *dws = spi_controller_get_devdata(master);
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struct chip_data *chip = spi_get_ctldata(spi);
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unsigned long flags;
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u8 imask = 0;
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u16 txlevel = 0;
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u32 cr0;
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int ret;
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dws->dma_mapped = 0;
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spin_lock_irqsave(&dws->buf_lock, flags);
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dws->tx = (void *)transfer->tx_buf;
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dws->tx_end = dws->tx + transfer->len;
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dws->rx = transfer->rx_buf;
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dws->rx_end = dws->rx + transfer->len;
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dws->len = transfer->len;
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spin_unlock_irqrestore(&dws->buf_lock, flags);
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spi_enable_chip(dws, 0);
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@ -470,6 +478,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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dws->type = SSI_MOTO_SPI;
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dws->dma_inited = 0;
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dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
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spin_lock_init(&dws->buf_lock);
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spi_controller_set_devdata(master, dws);
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@ -119,6 +119,7 @@ struct dw_spi {
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size_t len;
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void *tx;
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void *tx_end;
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spinlock_t buf_lock;
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void *rx;
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void *rx_end;
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int dma_mapped;
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