drm/radeon/dpm: adjust the vblank time checks for eg, ni, si
According to the internal teams, we never hit the limit for mclk switching on these asics, so we can disable the check. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2166,7 +2166,8 @@ bool cypress_dpm_vblank_too_short(struct radeon_device *rdev)
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{
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struct rv7xx_power_info *pi = rv770_get_pi(rdev);
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u32 vblank_time = r600_dpm_get_vblank_time(rdev);
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u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
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/* we never hit the non-gddr5 limit so disable it */
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u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
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if (vblank_time < switch_limit)
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return true;
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@ -769,7 +769,8 @@ bool ni_dpm_vblank_too_short(struct radeon_device *rdev)
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{
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struct rv7xx_power_info *pi = rv770_get_pi(rdev);
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u32 vblank_time = r600_dpm_get_vblank_time(rdev);
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u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
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/* we never hit the non-gddr5 limit so disable it */
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u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
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if (vblank_time < switch_limit)
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return true;
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