KVM: x86/mmu: Rename DEFAULT_SPTE_MMU_WRITEABLE to DEFAULT_SPTE_MMU_WRITABLE
Both "writeable" and "writable" are valid, but we should be consistent about which we use. DEFAULT_SPTE_MMU_WRITEABLE was the odd one out in the SPTE code, so rename it to DEFAULT_SPTE_MMU_WRITABLE. No functional change intended. Signed-off-by: David Matlack <dmatlack@google.com> Message-Id: <20220125230713.1700406-1-dmatlack@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -5844,7 +5844,7 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
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* will clear a separate software-only bit (MMU-writable) and skip the
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* flush if-and-only-if this bit was already clear.
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*
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* See DEFAULT_SPTE_MMU_WRITEABLE for more details.
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* See DEFAULT_SPTE_MMU_WRITABLE for more details.
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*/
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if (flush)
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kvm_arch_flush_remote_tlbs_memslot(kvm, memslot);
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@ -361,8 +361,8 @@ void kvm_mmu_reset_all_pte_masks(void)
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shadow_acc_track_mask = 0;
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shadow_me_mask = sme_me_mask;
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shadow_host_writable_mask = DEFAULT_SPTE_HOST_WRITEABLE;
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shadow_mmu_writable_mask = DEFAULT_SPTE_MMU_WRITEABLE;
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shadow_host_writable_mask = DEFAULT_SPTE_HOST_WRITABLE;
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shadow_mmu_writable_mask = DEFAULT_SPTE_MMU_WRITABLE;
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/*
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* Set a reserved PA bit in MMIO SPTEs to generate page faults with
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@ -75,7 +75,7 @@ static_assert(SPTE_TDP_AD_ENABLED_MASK == 0);
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static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK));
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/*
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* *_SPTE_HOST_WRITEABLE (aka Host-writable) indicates whether the host permits
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* *_SPTE_HOST_WRITABLE (aka Host-writable) indicates whether the host permits
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* writes to the guest page mapped by the SPTE. This bit is cleared on SPTEs
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* that map guest pages in read-only memslots and read-only VMAs.
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*
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@ -83,7 +83,7 @@ static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK));
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* - If Host-writable is clear, PT_WRITABLE_MASK must be clear.
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*
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*
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* *_SPTE_MMU_WRITEABLE (aka MMU-writable) indicates whether the shadow MMU
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* *_SPTE_MMU_WRITABLE (aka MMU-writable) indicates whether the shadow MMU
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* allows writes to the guest page mapped by the SPTE. This bit is cleared when
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* the guest page mapped by the SPTE contains a page table that is being
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* monitored for shadow paging. In this case the SPTE can only be made writable
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@ -100,8 +100,8 @@ static_assert(!(SPTE_TDP_AD_MASK & SHADOW_ACC_TRACK_SAVED_MASK));
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*/
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/* Bits 9 and 10 are ignored by all non-EPT PTEs. */
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#define DEFAULT_SPTE_HOST_WRITEABLE BIT_ULL(9)
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#define DEFAULT_SPTE_MMU_WRITEABLE BIT_ULL(10)
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#define DEFAULT_SPTE_HOST_WRITABLE BIT_ULL(9)
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#define DEFAULT_SPTE_MMU_WRITABLE BIT_ULL(10)
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/*
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* Low ignored bits are at a premium for EPT, use high ignored bits, taking care
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