x86/RAS: Simplify SMCA HWID descriptor struct
Call it simply smca_hwid and call local variables "hwid". More readable. Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Yazen Ghannam <yazen.ghannam@amd.com> Link: http://lkml.kernel.org/r/20161103125556.15482-2-bp@alien8.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -365,14 +365,14 @@ extern struct smca_bank_name smca_bank_names[N_SMCA_BANK_TYPES];
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#define HWID_MCATYPE(hwid, mcatype) ((hwid << 16) | mcatype)
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struct smca_hwid_mcatype {
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struct smca_hwid {
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unsigned int bank_type; /* Use with smca_bank_types for easy indexing. */
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u32 hwid_mcatype; /* (hwid,mcatype) tuple */
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u32 xec_bitmap; /* Bitmap of valid ExtErrorCodes; current max is 21. */
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};
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struct smca_bank {
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struct smca_hwid_mcatype *type;
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struct smca_hwid *hwid;
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/* Instance ID */
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u32 id;
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};
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@ -86,7 +86,7 @@ struct smca_bank_name smca_bank_names[] = {
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};
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EXPORT_SYMBOL_GPL(smca_bank_names);
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static struct smca_hwid_mcatype smca_hwid_mcatypes[] = {
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static struct smca_hwid smca_hwid_mcatypes[] = {
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/* { bank_type, hwid_mcatype, xec_bitmap } */
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/* ZN Core (HWID=0xB0) MCA types */
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@ -142,16 +142,11 @@ static void default_deferred_error_interrupt(void)
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}
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void (*deferred_error_int_vector)(void) = default_deferred_error_interrupt;
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/*
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* CPU Initialization
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*/
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static void get_smca_bank_info(unsigned int bank)
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{
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unsigned int i, hwid_mcatype, cpu = smp_processor_id();
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struct smca_hwid_mcatype *type;
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struct smca_hwid *s_hwid;
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u32 high, instance_id;
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u16 hwid, mcatype;
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/* Collect bank_info using CPU 0 for now. */
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if (cpu)
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@ -162,14 +157,13 @@ static void get_smca_bank_info(unsigned int bank)
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return;
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}
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hwid = high & MCI_IPID_HWID;
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mcatype = (high & MCI_IPID_MCATYPE) >> 16;
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hwid_mcatype = HWID_MCATYPE(hwid, mcatype);
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hwid_mcatype = HWID_MCATYPE(high & MCI_IPID_HWID,
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(high & MCI_IPID_MCATYPE) >> 16);
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for (i = 0; i < ARRAY_SIZE(smca_hwid_mcatypes); i++) {
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type = &smca_hwid_mcatypes[i];
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if (hwid_mcatype == type->hwid_mcatype) {
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smca_banks[bank].type = type;
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s_hwid = &smca_hwid_mcatypes[i];
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if (hwid_mcatype == s_hwid->hwid_mcatype) {
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smca_banks[bank].hwid = s_hwid;
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smca_banks[bank].id = instance_id;
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break;
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}
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@ -826,10 +820,10 @@ static const char *get_name(unsigned int bank, struct threshold_block *b)
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return th_names[bank];
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}
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if (!smca_banks[bank].type)
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if (!smca_banks[bank].hwid)
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return NULL;
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bank_type = smca_banks[bank].type->bank_type;
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bank_type = smca_banks[bank].hwid->bank_type;
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if (b && bank_type == SMCA_UMC) {
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if (b->block < ARRAY_SIZE(smca_umc_block_names))
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@ -851,7 +851,7 @@ static void decode_mc6_mce(struct mce *m)
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/* Decode errors according to Scalable MCA specification */
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static void decode_smca_errors(struct mce *m)
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{
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struct smca_hwid_mcatype *type;
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struct smca_hwid *hwid;
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unsigned int bank_type;
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const char *ip_name;
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u8 xec = XEC(m->status, xec_mask);
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@ -862,18 +862,18 @@ static void decode_smca_errors(struct mce *m)
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if (boot_cpu_data.x86 >= 0x17 && m->bank == 4)
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pr_emerg(HW_ERR "Bank 4 is reserved on Fam17h.\n");
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type = smca_banks[m->bank].type;
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if (!type)
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hwid = smca_banks[m->bank].hwid;
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if (!hwid)
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return;
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bank_type = type->bank_type;
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bank_type = hwid->bank_type;
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ip_name = smca_bank_names[bank_type].long_name;
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pr_emerg(HW_ERR "%s Extended Error Code: %d\n", ip_name, xec);
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/* Only print the decode of valid error codes */
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if (xec < smca_mce_descs[bank_type].num_descs &&
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(type->xec_bitmap & BIT_ULL(xec))) {
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(hwid->xec_bitmap & BIT_ULL(xec))) {
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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pr_cont("%s.\n", smca_mce_descs[bank_type].descs[xec]);
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}
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