DT: update ti,irq-crossbar binding
Make it look like a real interrupt controller. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-4-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -9,7 +9,9 @@ inputs.
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Required properties:
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- compatible : Should be "ti,irq-crossbar"
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- reg: Base address and the size of the crossbar registers.
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- ti,max-irqs: Total number of irqs available at the interrupt controller.
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- interrupt-controller: indicates that this block is an interrupt controller.
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- interrupt-parent: the interrupt controller this block is connected to.
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- ti,max-irqs: Total number of irqs available at the parent interrupt controller.
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- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
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- ti,reg-size: Size of a individual register in bytes. Every individual
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register is assumed to be of same size. Valid sizes are 1, 2, 4.
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@ -27,13 +29,13 @@ Optional properties:
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when the interrupt controller irq is unused (when not provided, default is 0)
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Examples:
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crossbar_mpu: @4a020000 {
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crossbar_mpu: crossbar@4a002a48 {
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compatible = "ti,irq-crossbar";
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reg = <0x4a002a48 0x130>;
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ti,max-irqs = <160>;
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ti,max-crossbar-sources = <400>;
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ti,reg-size = <2>;
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ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
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ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
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ti,irqs-skip = <10 133 139 140>;
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};
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@ -44,10 +46,6 @@ Documentation/devicetree/bindings/arm/gic.txt for further details.
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An interrupt consumer on an SoC using crossbar will use:
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interrupts = <GIC_SPI request_number interrupt_level>
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When the request number is between 0 to that described by
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"ti,max-crossbar-sources", it is assumed to be a crossbar mapping. If the
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request_number is greater than "ti,max-crossbar-sources", then it is mapped as a
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quirky hardware mapping direct to GIC.
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Example:
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device_x@0x4a023000 {
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@ -55,9 +53,3 @@ Example:
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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...
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};
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device_y@0x4a033000 {
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/* Direct mapped GIC SPI 1 used */
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interrupts = <GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH>;
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...
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};
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