cxgb4: collect ASIC LA dumps from ULP TX
Signed-off-by: Surendra Mobiya <surendra@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -281,12 +281,18 @@ struct cudbg_tid_data {
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#define CUDBG_NUM_ULPTX 11
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#define CUDBG_NUM_ULPTX_READ 512
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#define CUDBG_NUM_ULPTX_ASIC 6
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#define CUDBG_NUM_ULPTX_ASIC_READ 128
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#define CUDBG_ULPTX_LA_REV 1
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struct cudbg_ulptx_la {
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u32 rdptr[CUDBG_NUM_ULPTX];
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u32 wrptr[CUDBG_NUM_ULPTX];
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u32 rddata[CUDBG_NUM_ULPTX];
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u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
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u32 rdptr_asic[CUDBG_NUM_ULPTX_ASIC_READ];
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u32 rddata_asic[CUDBG_NUM_ULPTX_ASIC_READ][CUDBG_NUM_ULPTX_ASIC];
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};
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#define CUDBG_CHAC_PBT_ADDR 0x2800
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@ -2586,15 +2586,24 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
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struct adapter *padap = pdbg_init->adap;
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struct cudbg_buffer temp_buff = { 0 };
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struct cudbg_ulptx_la *ulptx_la_buff;
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struct cudbg_ver_hdr *ver_hdr;
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u32 i, j;
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int rc;
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rc = cudbg_get_buff(pdbg_init, dbg_buff, sizeof(struct cudbg_ulptx_la),
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rc = cudbg_get_buff(pdbg_init, dbg_buff,
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sizeof(struct cudbg_ver_hdr) +
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sizeof(struct cudbg_ulptx_la),
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&temp_buff);
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if (rc)
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return rc;
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ulptx_la_buff = (struct cudbg_ulptx_la *)temp_buff.data;
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ver_hdr = (struct cudbg_ver_hdr *)temp_buff.data;
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ver_hdr->signature = CUDBG_ENTITY_SIGNATURE;
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ver_hdr->revision = CUDBG_ULPTX_LA_REV;
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ver_hdr->size = sizeof(struct cudbg_ulptx_la);
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ulptx_la_buff = (struct cudbg_ulptx_la *)(temp_buff.data +
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sizeof(*ver_hdr));
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for (i = 0; i < CUDBG_NUM_ULPTX; i++) {
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ulptx_la_buff->rdptr[i] = t4_read_reg(padap,
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ULP_TX_LA_RDPTR_0_A +
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@ -2610,6 +2619,25 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
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t4_read_reg(padap,
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ULP_TX_LA_RDDATA_0_A + 0x10 * i);
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}
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for (i = 0; i < CUDBG_NUM_ULPTX_ASIC_READ; i++) {
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t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1);
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ulptx_la_buff->rdptr_asic[i] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A);
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ulptx_la_buff->rddata_asic[i][0] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_0_A);
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ulptx_la_buff->rddata_asic[i][1] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_1_A);
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ulptx_la_buff->rddata_asic[i][2] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_2_A);
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ulptx_la_buff->rddata_asic[i][3] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_3_A);
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ulptx_la_buff->rddata_asic[i][4] =
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t4_read_reg(padap, ULP_TX_ASIC_DEBUG_4_A);
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ulptx_la_buff->rddata_asic[i][5] =
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t4_read_reg(padap, PM_RX_BASE_ADDR);
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}
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return cudbg_write_and_release_buff(pdbg_init, &temp_buff, dbg_buff);
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}
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@ -273,7 +273,8 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
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}
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break;
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case CUDBG_ULPTX_LA:
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len = sizeof(struct cudbg_ulptx_la);
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len = sizeof(struct cudbg_ver_hdr) +
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sizeof(struct cudbg_ulptx_la);
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break;
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case CUDBG_UP_CIM_INDIRECT:
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n = 0;
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@ -1683,6 +1683,16 @@
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#define ULP_TX_LA_RDPTR_0_A 0x8ec0
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#define ULP_TX_LA_RDDATA_0_A 0x8ec4
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#define ULP_TX_LA_WRPTR_0_A 0x8ec8
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#define ULP_TX_ASIC_DEBUG_CTRL_A 0x8f70
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#define ULP_TX_ASIC_DEBUG_0_A 0x8f74
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#define ULP_TX_ASIC_DEBUG_1_A 0x8f78
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#define ULP_TX_ASIC_DEBUG_2_A 0x8f7c
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#define ULP_TX_ASIC_DEBUG_3_A 0x8f80
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#define ULP_TX_ASIC_DEBUG_4_A 0x8f84
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/* registers for module PM_RX */
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#define PM_RX_BASE_ADDR 0x8fc0
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#define PMRX_E_PCMD_PAR_ERROR_S 0
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#define PMRX_E_PCMD_PAR_ERROR_V(x) ((x) << PMRX_E_PCMD_PAR_ERROR_S)
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