serial: 8250: Add Quark X1000 to 8250_pci.c
Quark X1000 contains two designware derived 8250 serial ports. Each port has a unique PCI configuration space consisting of BAR0:UART BAR1:DMA respectively. Unlike the standard 8250 the register width is 32 bits for RHR,IER etc The Quark UART has a fundamental clock @ 44.2368 MHz allowing for a bitrate of up to about 2.76 megabits per second. This patch enables standard 8250 mode Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1788,6 +1788,7 @@ pci_wch_ch353_setup(struct serial_private *priv,
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#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
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#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a
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#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e
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#define PCI_DEVICE_ID_INTEL_QRK_UART 0x0936
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#define PCI_VENDOR_ID_SUNIX 0x1fd4
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#define PCI_DEVICE_ID_SUNIX_1999 0x1999
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@ -1898,6 +1899,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
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.subdevice = PCI_ANY_ID,
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.setup = byt_serial_setup,
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},
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{
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = PCI_DEVICE_ID_INTEL_QRK_UART,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.setup = pci_default_setup,
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},
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/*
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* ITE
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*/
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@ -2740,6 +2748,7 @@ enum pci_board_num_t {
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pbn_ADDIDATA_PCIe_8_3906250,
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pbn_ce4100_1_115200,
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pbn_byt,
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pbn_qrk,
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pbn_omegapci,
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pbn_NETMOS9900_2s_115200,
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pbn_brcm_trumanage,
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@ -3490,6 +3499,12 @@ static struct pciserial_board pci_boards[] = {
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.uart_offset = 0x80,
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.reg_shift = 2,
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},
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[pbn_qrk] = {
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.flags = FL_BASE0,
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.num_ports = 1,
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.base_baud = 2764800,
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.reg_shift = 2,
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},
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[pbn_omegapci] = {
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.flags = FL_BASE0,
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.num_ports = 8,
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@ -5191,6 +5206,12 @@ static struct pci_device_id serial_pci_tbl[] = {
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PCI_CLASS_COMMUNICATION_SERIAL << 8, 0xff0000,
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pbn_byt },
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/*
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* Intel Quark x1000
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*/
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_UART,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_qrk },
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/*
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* Cronyx Omega PCI
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*/
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