clk: imx8mq: Add support for the CLKO1 clock
Add the entry for the CLKO1 clock. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -267,6 +267,8 @@ static const char * const imx8mq_ecspi3_sels[] = {"osc_25m", "sys2_pll_200m", "s
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"sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
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static const char * const imx8mq_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
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static const char * const imx8mq_clko1_sels[] = {"osc_25m", "sys1_pll_800m", "osc_27m", "sys1_pll_200m",
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"audio_pll2_out", "sys2_pll_500m", "vpu_pll_out", "sys1_pll_80m", };
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static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m",
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"sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "ckil", };
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@ -486,6 +488,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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clks[IMX8MQ_CLK_GPT1] = imx8m_clk_composite("gpt1", imx8mq_gpt1_sels, base + 0xb580);
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clks[IMX8MQ_CLK_WDOG] = imx8m_clk_composite("wdog", imx8mq_wdog_sels, base + 0xb900);
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clks[IMX8MQ_CLK_WRCLK] = imx8m_clk_composite("wrclk", imx8mq_wrclk_sels, base + 0xb980);
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clks[IMX8MQ_CLK_CLKO1] = imx8m_clk_composite("clko1", imx8mq_clko1_sels, base + 0xba00);
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clks[IMX8MQ_CLK_CLKO2] = imx8m_clk_composite("clko2", imx8mq_clko2_sels, base + 0xba80);
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clks[IMX8MQ_CLK_DSI_CORE] = imx8m_clk_composite("dsi_core", imx8mq_dsi_core_sels, base + 0xbb00);
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clks[IMX8MQ_CLK_DSI_PHY_REF] = imx8m_clk_composite("dsi_phy_ref", imx8mq_dsi_phy_sels, base + 0xbb80);
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@ -391,5 +391,7 @@
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#define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 267
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#define IMX8MQ_CLK_END 268
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#define IMX8MQ_CLK_CLKO1 268
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#define IMX8MQ_CLK_END 269
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#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
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