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drm/i915: Move DP M/N setup from update_pll to mode_set for gmch platforms 

There's no point in hiding the DP M/N setup in the update_pll functions.
Just move it to the mode_set function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ville Syrjälä 2014-03-31 18:21:25 +03:00 committed by Daniel Vetter
parent a2a5b15c51
commit 2070f00c79
1 changed files with 3 additions and 6 deletions
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9
drivers/gpu/drm/i915/intel_display.c
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@ -5218,9 +5218,6 @@ static void vlv_update_pll(struct intel_crtc *crtc)
<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
crtc->config.dpll_hw_state.dpll_md = dpll_md;
if (crtc->config.has_dp_encoder)
intel_dp_set_m_n(crtc);
mutex_unlock(&dev_priv->dpio_lock);
}
@ -5298,9 +5295,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
crtc->config.dpll_hw_state.dpll_md = dpll_md;
}
if (crtc->config.has_dp_encoder)
intel_dp_set_m_n(crtc);
}
static void i8xx_update_pll(struct intel_crtc *crtc,
@ -5629,6 +5623,9 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
dspcntr |= DISPPLANE_SEL_PIPE_B;
}
if (intel_crtc->config.has_dp_encoder)
intel_dp_set_m_n(intel_crtc);
intel_set_pipe_timings(intel_crtc);
/* pipesrc and dspsize control the size that is scaled from,