Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar: - Minor improvement : avoid requiring unnecessary startup/shutdown callback that many drivers seem to not need - New controller driver for Qualcomm's APCS IPC * 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: Introduce Qualcomm APCS IPC driver dt-bindings: mailbox: Introduce Qualcomm APCS global binding mailbox: Make startup and shutdown ops optional
This commit is contained in:
Linus Torvalds
commit
21c19bc7ee
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@ -0,0 +1,46 @@
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Binding for the Qualcomm APCS global block
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==========================================
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This binding describes the APCS "global" block found in various Qualcomm
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platforms.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be one of:
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"qcom,msm8916-apcs-kpss-global",
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"qcom,msm8996-apcs-hmss-global"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: must specify the base address and size of the global block
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- #mbox-cells:
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Usage: required
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Value type: <u32>
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Definition: as described in mailbox.txt, must be 1
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= EXAMPLE
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The following example describes the APCS HMSS found in MSM8996 and part of the
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GLINK RPM referencing the "rpm_hlos" doorbell therein.
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apcs_glb: mailbox@9820000 {
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compatible = "qcom,msm8996-apcs-hmss-global";
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reg = <0x9820000 0x1000>;
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#mbox-cells = <1>;
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};
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rpm-glink {
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compatible = "qcom,glink-rpm";
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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mboxes = <&apcs_glb 0>;
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mbox-names = "rpm_hlos";
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};
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@ -124,6 +124,14 @@ config MAILBOX_TEST
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Test client to help with testing new Controller driver
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implementations.
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config QCOM_APCS_IPC
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tristate "Qualcomm APCS IPC driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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Say y here to enable support for the APCS IPC mailbox driver,
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providing an interface for invoking the inter-process communication
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signals from the application processor to other masters.
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config TEGRA_HSP_MBOX
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bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
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depends on ARCH_TEGRA_186_SOC
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@ -32,4 +32,6 @@ obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
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obj-$(CONFIG_BCM_FLEXRM_MBOX) += bcm-flexrm-mailbox.o
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obj-$(CONFIG_QCOM_APCS_IPC) += qcom-apcs-ipc-mailbox.o
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obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
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@ -355,11 +355,14 @@ struct mbox_chan *mbox_request_channel(struct mbox_client *cl, int index)
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spin_unlock_irqrestore(&chan->lock, flags);
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ret = chan->mbox->ops->startup(chan);
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if (ret) {
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dev_err(dev, "Unable to startup the chan (%d)\n", ret);
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mbox_free_channel(chan);
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chan = ERR_PTR(ret);
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if (chan->mbox->ops->startup) {
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ret = chan->mbox->ops->startup(chan);
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if (ret) {
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dev_err(dev, "Unable to startup the chan (%d)\n", ret);
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mbox_free_channel(chan);
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chan = ERR_PTR(ret);
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}
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}
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mutex_unlock(&con_mutex);
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@ -408,7 +411,8 @@ void mbox_free_channel(struct mbox_chan *chan)
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if (!chan || !chan->cl)
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return;
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chan->mbox->ops->shutdown(chan);
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if (chan->mbox->ops->shutdown)
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chan->mbox->ops->shutdown(chan);
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/* The queued TX requests are simply aborted, no callbacks are made */
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spin_lock_irqsave(&chan->lock, flags);
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@ -0,0 +1,129 @@
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/*
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* Copyright (c) 2017, Linaro Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/mailbox_controller.h>
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#define QCOM_APCS_IPC_BITS 32
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struct qcom_apcs_ipc {
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struct mbox_controller mbox;
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struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];
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void __iomem *reg;
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unsigned long offset;
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};
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static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
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{
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struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
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struct qcom_apcs_ipc, mbox);
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unsigned long idx = (unsigned long)chan->con_priv;
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writel(BIT(idx), apcs->reg);
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return 0;
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}
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static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
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.send_data = qcom_apcs_ipc_send_data,
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};
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static int qcom_apcs_ipc_probe(struct platform_device *pdev)
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{
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struct qcom_apcs_ipc *apcs;
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struct resource *res;
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unsigned long offset;
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void __iomem *base;
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unsigned long i;
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int ret;
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apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
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if (!apcs)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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offset = (unsigned long)of_device_get_match_data(&pdev->dev);
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apcs->reg = base + offset;
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/* Initialize channel identifiers */
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for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
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apcs->mbox_chans[i].con_priv = (void *)i;
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apcs->mbox.dev = &pdev->dev;
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apcs->mbox.ops = &qcom_apcs_ipc_ops;
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apcs->mbox.chans = apcs->mbox_chans;
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apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
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ret = mbox_controller_register(&apcs->mbox);
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if (ret) {
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dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
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return ret;
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}
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platform_set_drvdata(pdev, apcs);
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return 0;
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}
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static int qcom_apcs_ipc_remove(struct platform_device *pdev)
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{
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struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
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mbox_controller_unregister(&apcs->mbox);
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return 0;
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}
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/* .data is the offset of the ipc register within the global block */
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static const struct of_device_id qcom_apcs_ipc_of_match[] = {
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{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = (void *)8 },
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{ .compatible = "qcom,msm8996-apcs-hmss-global", .data = (void *)16 },
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{}
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};
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MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);
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static struct platform_driver qcom_apcs_ipc_driver = {
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.probe = qcom_apcs_ipc_probe,
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.remove = qcom_apcs_ipc_remove,
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.driver = {
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.name = "qcom_apcs_ipc",
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.of_match_table = qcom_apcs_ipc_of_match,
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},
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};
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static int __init qcom_apcs_ipc_init(void)
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{
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return platform_driver_register(&qcom_apcs_ipc_driver);
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}
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postcore_initcall(qcom_apcs_ipc_init);
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static void __exit qcom_apcs_ipc_exit(void)
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{
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platform_driver_unregister(&qcom_apcs_ipc_driver);
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}
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module_exit(qcom_apcs_ipc_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Qualcomm APCS IPC driver");
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