staging: most: dim2: use device tree
This patch removes the dependency to platform specific source files that do platform specific initialization and supply the IRQ number. Instead DT code is added Signed-off-by: Christian Gromm <christian.gromm@microchip.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
993c1637a0
commit
21e57ff086
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@ -4,7 +4,7 @@
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config MOST_DIM2
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tristate "DIM2"
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depends on HAS_IOMEM
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depends on HAS_IOMEM && OF
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---help---
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Say Y here if you want to connect via MediaLB to network transceiver.
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@ -8,6 +8,7 @@
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/printk.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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@ -15,13 +16,13 @@
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include "most/core.h"
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#include "hal.h"
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#include "dim2.h"
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#include "errors.h"
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#include "sysfs.h"
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@ -88,6 +89,9 @@ struct dim2_hdm {
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struct most_interface most_iface;
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char name[16 + sizeof "dim2-"];
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void __iomem *io_base;
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u8 clk_speed;
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struct clk *clk;
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struct clk *clk_pll;
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struct task_struct *netinfo_task;
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wait_queue_head_t netinfo_waitq;
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int deliver_netinfo;
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@ -97,6 +101,12 @@ struct dim2_hdm {
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struct medialb_bus bus;
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void (*on_netinfo)(struct most_interface *most_iface,
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unsigned char link_state, unsigned char *addrs);
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void (*disable_platform)(struct platform_device *);
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};
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struct dim2_platform_data {
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int (*enable)(struct platform_device *);
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void (*disable)(struct platform_device *);
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};
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#define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)
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@ -681,6 +691,8 @@ static void dma_free(struct mbo *mbo, u32 size)
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dma_free_coherent(NULL, size, mbo->virt_address, mbo->bus_address);
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}
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static const struct of_device_id dim2_of_match[];
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/*
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* dim2_probe - dim2 probe handler
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* @pdev: platform device structure
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@ -690,13 +702,16 @@ static void dma_free(struct mbo *mbo, u32 size)
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*/
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static int dim2_probe(struct platform_device *pdev)
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{
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struct dim2_platform_data *pdata = pdev->dev.platform_data;
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const struct dim2_platform_data *pdata;
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const struct of_device_id *of_id;
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struct dim2_hdm *dev;
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struct resource *res;
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int ret, i;
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u8 hal_ret;
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int irq;
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enum { MLB_INT_IDX, AHB0_INT_IDX };
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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@ -704,29 +719,31 @@ static int dim2_probe(struct platform_device *pdev)
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dev->atx_idx = -1;
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platform_set_drvdata(pdev, dev);
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dev->clk_speed = CLK_4096FS;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dev->io_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(dev->io_base))
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return PTR_ERR(dev->io_base);
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if (!pdata) {
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dev_err(&pdev->dev, "missing platform data\n");
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return -EINVAL;
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}
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ret = pdata->init ? pdata->init(pdata, dev->io_base) : 0;
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of_id = of_match_node(dim2_of_match, pdev->dev.of_node);
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pdata = of_id->data;
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ret = pdata && pdata->enable ? pdata->enable(pdev) : 0;
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if (ret)
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return ret;
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dev->disable_platform = pdata ? pdata->disable : 0;
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dev_info(&pdev->dev, "sync: num of frames per sub-buffer: %u\n", fcnt);
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hal_ret = dim_startup(dev->io_base, pdata->clk_speed, fcnt);
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hal_ret = dim_startup(dev->io_base, dev->clk_speed, fcnt);
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if (hal_ret != DIM_NO_ERROR) {
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dev_err(&pdev->dev, "dim_startup failed: %d\n", hal_ret);
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ret = -ENODEV;
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goto err_bsp_destroy;
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goto err_disable_platform;
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}
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irq = platform_get_irq(pdev, 0);
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irq = platform_get_irq(pdev, AHB0_INT_IDX);
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if (irq < 0) {
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dev_err(&pdev->dev, "failed to get ahb0_int irq: %d\n", irq);
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ret = irq;
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@ -740,7 +757,7 @@ static int dim2_probe(struct platform_device *pdev)
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goto err_shutdown_dim;
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}
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irq = platform_get_irq(pdev, 1);
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irq = platform_get_irq(pdev, MLB_INT_IDX);
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if (irq < 0) {
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dev_err(&pdev->dev, "failed to get mlb_int irq: %d\n", irq);
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ret = irq;
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@ -828,9 +845,9 @@ static int dim2_probe(struct platform_device *pdev)
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kthread_stop(dev->netinfo_task);
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err_shutdown_dim:
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dim_shutdown();
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err_bsp_destroy:
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if (pdata && pdata->destroy)
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pdata->destroy(pdata);
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err_disable_platform:
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if (dev->disable_platform)
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dev->disable_platform(pdev);
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return ret;
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}
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@ -844,7 +861,6 @@ static int dim2_probe(struct platform_device *pdev)
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static int dim2_remove(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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struct dim2_platform_data *pdata = pdev->dev.platform_data;
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unsigned long flags;
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dim2_sysfs_destroy(&dev->dev);
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@ -855,37 +871,187 @@ static int dim2_remove(struct platform_device *pdev)
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dim_shutdown();
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spin_unlock_irqrestore(&dim_lock, flags);
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if (pdata && pdata->destroy)
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pdata->destroy(pdata);
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/*
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* break link to local platform_device_id struct
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* to prevent crash by unload platform device module
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*/
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pdev->id_entry = NULL;
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if (dev->disable_platform)
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dev->disable_platform(pdev);
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return 0;
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}
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static const struct platform_device_id dim2_id[] = {
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{ "medialb_dim2" },
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{ }, /* Terminating entry */
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/* platform specific functions [[ */
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static int fsl_mx6_enable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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int ret;
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dev->clk = devm_clk_get(&pdev->dev, "mlb");
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if (IS_ERR_OR_NULL(dev->clk)) {
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dev_err(&pdev->dev, "unable to get mlb clock\n");
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return -EFAULT;
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}
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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dev_err(&pdev->dev, "%s\n", "clk_prepare_enable failed");
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return ret;
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}
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if (dev->clk_speed >= CLK_2048FS) {
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/* enable pll */
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dev->clk_pll = devm_clk_get(&pdev->dev, "pll8_mlb");
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if (IS_ERR_OR_NULL(dev->clk_pll)) {
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dev_err(&pdev->dev, "unable to get mlb pll clock\n");
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clk_disable_unprepare(dev->clk);
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return -EFAULT;
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}
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writel(0x888, dev->io_base + 0x38);
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clk_prepare_enable(dev->clk_pll);
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}
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return 0;
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}
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static void fsl_mx6_disable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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if (dev->clk_speed >= CLK_2048FS)
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clk_disable_unprepare(dev->clk_pll);
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clk_disable_unprepare(dev->clk);
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}
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static int rcar_h2_enable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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int ret;
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk)) {
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dev_err(&pdev->dev, "cannot get clock\n");
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return PTR_ERR(dev->clk);
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}
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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dev_err(&pdev->dev, "%s\n", "clk_prepare_enable failed");
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return ret;
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}
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if (dev->clk_speed >= CLK_2048FS) {
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/* enable MLP pll and LVDS drivers */
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writel(0x03, dev->io_base + 0x600);
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/* set bias */
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writel(0x888, dev->io_base + 0x38);
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} else {
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/* PLL */
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writel(0x04, dev->io_base + 0x600);
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}
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/* BBCR = 0b11 */
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writel(0x03, dev->io_base + 0x500);
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writel(0x0002FF02, dev->io_base + 0x508);
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return 0;
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}
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static void rcar_h2_disable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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clk_disable_unprepare(dev->clk);
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/* disable PLLs and LVDS drivers */
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writel(0x0, dev->io_base + 0x600);
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}
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static int rcar_m3_enable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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u32 enable_512fs = dev->clk_speed == CLK_512FS;
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int ret;
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dev->clk)) {
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dev_err(&pdev->dev, "cannot get clock\n");
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return PTR_ERR(dev->clk);
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}
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ret = clk_prepare_enable(dev->clk);
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if (ret) {
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dev_err(&pdev->dev, "%s\n", "clk_prepare_enable failed");
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return ret;
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}
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/* PLL */
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writel(0x04, dev->io_base + 0x600);
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writel(enable_512fs, dev->io_base + 0x604);
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/* BBCR = 0b11 */
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writel(0x03, dev->io_base + 0x500);
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writel(0x0002FF02, dev->io_base + 0x508);
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return 0;
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}
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static void rcar_m3_disable(struct platform_device *pdev)
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{
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struct dim2_hdm *dev = platform_get_drvdata(pdev);
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clk_disable_unprepare(dev->clk);
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/* disable PLLs and LVDS drivers */
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writel(0x0, dev->io_base + 0x600);
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}
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/* ]] platform specific functions */
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enum dim2_platforms { FSL_MX6, RCAR_H2, RCAR_M3 };
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static struct dim2_platform_data plat_data[] = {
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[FSL_MX6] = { .enable = fsl_mx6_enable, .disable = fsl_mx6_disable },
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[RCAR_H2] = { .enable = rcar_h2_enable, .disable = rcar_h2_disable },
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[RCAR_M3] = { .enable = rcar_m3_enable, .disable = rcar_m3_disable },
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};
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MODULE_DEVICE_TABLE(platform, dim2_id);
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static const struct of_device_id dim2_of_match[] = {
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{
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.compatible = "fsl,imx6q-mlb150",
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.data = plat_data + FSL_MX6
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},
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{
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.compatible = "renesas,mlp",
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.data = plat_data + RCAR_H2
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},
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{
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.compatible = "rcar,medialb-dim2",
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.data = plat_data + RCAR_M3
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},
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{
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.compatible = "xlnx,axi4-os62420_3pin-1.00.a",
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},
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{
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.compatible = "xlnx,axi4-os62420_6pin-1.00.a",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, dim2_of_match);
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static struct platform_driver dim2_driver = {
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.probe = dim2_probe,
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.remove = dim2_remove,
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.id_table = dim2_id,
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.driver = {
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.name = "hdm_dim2",
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.of_match_table = dim2_of_match,
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},
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};
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module_platform_driver(dim2_driver);
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MODULE_AUTHOR("Jain Roy Ambi <JainRoy.Ambi@microchip.com>");
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MODULE_AUTHOR("Andrey Shvetsov <andrey.shvetsov@k2l.de>");
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MODULE_DESCRIPTION("MediaLB DIM2 Hardware Dependent Module");
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MODULE_LICENSE("GPL");
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@ -1,22 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dim2.h - MediaLB DIM2 HDM Header
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*
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* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
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*/
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#ifndef DIM2_HDM_H
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#define DIM2_HDM_H
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#include <linux/types.h>
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struct device;
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/* platform dependent data for dim2 interface */
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struct dim2_platform_data {
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int (*init)(struct dim2_platform_data *pd, void __iomem *io_base);
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void (*destroy)(struct dim2_platform_data *pd);
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u8 clk_speed;
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};
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#endif /* DIM2_HDM_H */
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