staging: comedi: mite: cleanup remaining mite register/bits
For aesthetics, convert the register/bit enums into defines and use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -104,49 +104,49 @@ int mite_init_ring_descriptors(struct mite_dma_descriptor_ring *ring,
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struct comedi_subdevice *s,
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unsigned int nbytes);
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enum mite_registers {
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MITE_IODWBSR = 0xc0, /* IO Device Window Base Size Register */
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MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */
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MITE_IODWCR_1 = 0xf4,
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};
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/*
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* Mite registers (used outside of the mite driver)
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*/
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#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size */
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#define MITE_IODWBSR_1 0xc4 /* IO Device Window1 Base Size */
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#define WENAB BIT(7) /* window enable */
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#define MITE_IODWCR_1 0xf4
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enum MITE_IODWBSR_bits {
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WENAB = 0x80, /* window enable */
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};
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enum CHSR_bits {
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CHSR_INT = (1 << 31),
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CHSR_LPAUSES = (1 << 29),
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CHSR_SARS = (1 << 27),
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CHSR_DONE = (1 << 25),
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CHSR_MRDY = (1 << 23),
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CHSR_DRDY = (1 << 21),
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CHSR_LINKC = (1 << 19),
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CHSR_CONTS_RB = (1 << 17),
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CHSR_ERROR = (1 << 15),
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CHSR_SABORT = (1 << 14),
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CHSR_HABORT = (1 << 13),
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CHSR_STOPS = (1 << 12),
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CHSR_OPERR_MASK = (3 << 10),
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CHSR_OPERR_NOERROR = (0 << 10),
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CHSR_OPERR_FIFOERROR = (1 << 10),
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CHSR_OPERR_LINKERROR = (1 << 10), /* ??? */
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CHSR_XFERR = (1 << 9),
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CHSR_END = (1 << 8),
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CHSR_DRQ1 = (1 << 7),
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CHSR_DRQ0 = (1 << 6),
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CHSR_LERR_MASK = (3 << 4),
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CHSR_LBERR = (1 << 4),
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CHSR_LRERR = (2 << 4),
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CHSR_LOERR = (3 << 4),
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CHSR_MERR_MASK = (3 << 2),
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CHSR_MBERR = (1 << 2),
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CHSR_MRERR = (2 << 2),
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CHSR_MOERR = (3 << 2),
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CHSR_DERR_MASK = (3 << 0),
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CHSR_DBERR = (1 << 0),
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CHSR_DRERR = (2 << 0),
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CHSR_DOERR = (3 << 0),
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};
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#define CHSR_INT BIT(31)
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#define CHSR_LPAUSES BIT(29)
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#define CHSR_SARS BIT(27)
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#define CHSR_DONE BIT(25)
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#define CHSR_MRDY BIT(23)
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#define CHSR_DRDY BIT(21)
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#define CHSR_LINKC BIT(19)
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#define CHSR_CONTS_RB BIT(17)
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#define CHSR_ERROR BIT(15)
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#define CHSR_SABORT BIT(14)
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#define CHSR_HABORT BIT(13)
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#define CHSR_STOPS BIT(12)
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#define CHSR_OPERR(x) (((x) & 0x3) << 10)
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#define CHSR_OPERR_MASK CHSR_OPERR(3)
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#define CHSR_OPERR_NOERROR CHSR_OPERR(0)
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#define CHSR_OPERR_FIFOERROR CHSR_OPERR(1)
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#define CHSR_OPERR_LINKERROR CHSR_OPERR(1) /* ??? */
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#define CHSR_XFERR BIT(9)
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#define CHSR_END BIT(8)
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#define CHSR_DRQ1 BIT(7)
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#define CHSR_DRQ0 BIT(6)
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#define CHSR_LERR(x) (((x) & 0x3) << 4)
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#define CHSR_LERR_MASK CHSR_LERR(3)
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#define CHSR_LBERR CHSR_LERR(1)
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#define CHSR_LRERR CHSR_LERR(2)
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#define CHSR_LOERR CHSR_LERR(3)
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#define CHSR_MERR(x) (((x) & 0x3) << 2)
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#define CHSR_MERR_MASK CHSR_MERR(3)
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#define CHSR_MBERR CHSR_MERR(1)
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#define CHSR_MRERR CHSR_MERR(2)
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#define CHSR_MOERR CHSR_MERR(3)
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#define CHSR_DERR(x) (((x) & 0x3) << 0)
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#define CHSR_DERR_MASK CHSR_DERR(3)
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#define CHSR_DBERR CHSR_DERR(1)
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#define CHSR_DRERR CHSR_DERR(2)
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#define CHSR_DOERR CHSR_DERR(3)
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#endif
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