ASoC: fsl ssi doc: Move optional properties to the correct section
Properties 'fsl,ssi-asynchronous', 'fsl,playback-dma' and 'fsl,capture-dma' are optional, so move them under the optional section of the document. While at it mention that 'fsl,playback-dma' and 'fsl,capture-dma' only apply to Power Architecture. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Timur Tabi <timur@tabi.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -20,24 +20,8 @@ Required properties:
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have.
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have.
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- interrupt-parent: The phandle for the interrupt controller that
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- interrupt-parent: The phandle for the interrupt controller that
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services interrupts for this device.
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services interrupts for this device.
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- fsl,playback-dma: Phandle to a node for the DMA channel to use for
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playback of audio. This is typically dictated by SOC
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design. See the notes below.
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- fsl,capture-dma: Phandle to a node for the DMA channel to use for
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capture (recording) of audio. This is typically dictated
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by SOC design. See the notes below.
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- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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- fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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This number is the maximum allowed value for SFCSR[TFWM0].
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This number is the maximum allowed value for SFCSR[TFWM0].
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- fsl,ssi-asynchronous:
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If specified, the SSI is to be programmed in asynchronous
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mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
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all be connected to valid signals. In synchronous mode,
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SRCK and SRFS are ignored. Asynchronous mode allows
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playback and capture to use different sample sizes and
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sample rates. Some drivers may require that SRCK and STCK
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be connected together, and SRFS and STFS be connected
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together. This would still allow different sample sizes,
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but not different sample rates.
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- clocks: "ipg" - Required clock for the SSI unit
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- clocks: "ipg" - Required clock for the SSI unit
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"baud" - Required clock for SSI master mode. Otherwise this
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"baud" - Required clock for SSI master mode. Otherwise this
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clock is not used
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clock is not used
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@ -61,6 +45,24 @@ Optional properties:
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- fsl,mode: The operating mode for the AC97 interface only.
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- fsl,mode: The operating mode for the AC97 interface only.
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"ac97-slave" - AC97 mode, SSI is clock slave
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"ac97-slave" - AC97 mode, SSI is clock slave
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"ac97-master" - AC97 mode, SSI is clock master
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"ac97-master" - AC97 mode, SSI is clock master
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- fsl,ssi-asynchronous:
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If specified, the SSI is to be programmed in asynchronous
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mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
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all be connected to valid signals. In synchronous mode,
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SRCK and SRFS are ignored. Asynchronous mode allows
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playback and capture to use different sample sizes and
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sample rates. Some drivers may require that SRCK and STCK
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be connected together, and SRFS and STFS be connected
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together. This would still allow different sample sizes,
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but not different sample rates.
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- fsl,playback-dma: Phandle to a node for the DMA channel to use for
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playback of audio. This is typically dictated by SOC
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design. See the notes below.
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Only used on Power Architecture.
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- fsl,capture-dma: Phandle to a node for the DMA channel to use for
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capture (recording) of audio. This is typically dictated
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by SOC design. See the notes below.
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Only used on Power Architecture.
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Child 'codec' node required properties:
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Child 'codec' node required properties:
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- compatible: Compatible list, contains the name of the codec
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- compatible: Compatible list, contains the name of the codec
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