pinctrl: cherryview: Configure HiZ pins to be input when requested as GPIOs
If the pin is in HiZ mode when it is requested as GPIO its value cannot be read (it always returns 0). In order to cope with the Linux GPIO subsystem where we do not have such state at all, turn the pin to be input instead. Reported-by: Jerome Blin <jerome.blin@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
34027ca2bb
commit
2479c7300e
|
@ -880,9 +880,22 @@ static int chv_gpio_request_enable(struct pinctrl_dev *pctldev,
|
|||
value &= ~CHV_PADCTRL1_INVRXTX_MASK;
|
||||
chv_writel(value, reg);
|
||||
|
||||
/* Switch to a GPIO mode */
|
||||
reg = chv_padreg(pctrl, offset, CHV_PADCTRL0);
|
||||
value = readl(reg) | CHV_PADCTRL0_GPIOEN;
|
||||
value = readl(reg);
|
||||
|
||||
/*
|
||||
* If the pin is in HiZ mode (both TX and RX buffers are
|
||||
* disabled) we turn it to be input now.
|
||||
*/
|
||||
if ((value & CHV_PADCTRL0_GPIOCFG_MASK) ==
|
||||
(CHV_PADCTRL0_GPIOCFG_HIZ << CHV_PADCTRL0_GPIOCFG_SHIFT)) {
|
||||
value &= ~CHV_PADCTRL0_GPIOCFG_MASK;
|
||||
value |= CHV_PADCTRL0_GPIOCFG_GPI <<
|
||||
CHV_PADCTRL0_GPIOCFG_SHIFT;
|
||||
}
|
||||
|
||||
/* Switch to a GPIO mode */
|
||||
value |= CHV_PADCTRL0_GPIOEN;
|
||||
chv_writel(value, reg);
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue