ARM: shmobile: R-Mobile: Store SYSC base address in rmobile_pm_domain
Replace the hardcoded addresses for accessing the SYSC PM domain registers by register offsets, relative to the SYSC base address stored in struct rmobile_pm_domain. In the future, the SYSC base address will come from DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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25717b8573
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@ -9,10 +9,14 @@
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* for more details.
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*/
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#include <linux/console.h>
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#include <linux/io.h>
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#include <linux/suspend.h>
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#include "common.h"
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#include "pm-rmobile.h"
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#define SYSC_BASE IOMEM(0xe6180000)
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#if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
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static int r8a7740_pd_a3sm_suspend(void)
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{
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@ -45,41 +49,51 @@ static int r8a7740_pd_d4_suspend(void)
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static struct rmobile_pm_domain r8a7740_pm_domains[] = {
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{
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.genpd.name = "A4LC",
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.base = SYSC_BASE,
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.bit_shift = 1,
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}, {
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.genpd.name = "A4MP",
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.base = SYSC_BASE,
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.bit_shift = 2,
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}, {
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.genpd.name = "D4",
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.base = SYSC_BASE,
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.bit_shift = 3,
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.gov = &pm_domain_always_on_gov,
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.suspend = r8a7740_pd_d4_suspend,
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}, {
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.genpd.name = "A4R",
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.base = SYSC_BASE,
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.bit_shift = 5,
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}, {
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.genpd.name = "A3RV",
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.base = SYSC_BASE,
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.bit_shift = 6,
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}, {
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.genpd.name = "A4S",
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.base = SYSC_BASE,
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.bit_shift = 10,
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.no_debug = true,
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}, {
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.genpd.name = "A3SP",
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.base = SYSC_BASE,
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.bit_shift = 11,
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.gov = &pm_domain_always_on_gov,
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.no_debug = true,
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.suspend = r8a7740_pd_a3sp_suspend,
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}, {
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.genpd.name = "A3SM",
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.base = SYSC_BASE,
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.bit_shift = 12,
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.gov = &pm_domain_always_on_gov,
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.suspend = r8a7740_pd_a3sm_suspend,
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}, {
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.genpd.name = "A3SG",
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.base = SYSC_BASE,
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.bit_shift = 13,
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}, {
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.genpd.name = "A4SU",
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.base = SYSC_BASE,
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.bit_shift = 20,
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},
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};
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@ -20,9 +20,9 @@
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#include "pm-rmobile.h"
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/* SYSC */
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#define SPDCR IOMEM(0xe6180008)
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#define SWUCR IOMEM(0xe6180014)
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#define PSTR IOMEM(0xe6180080)
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#define SPDCR 0x08 /* SYS Power Down Control Register */
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#define SWUCR 0x14 /* SYS Wakeup Control Register */
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#define PSTR 0x80 /* Power Status Register */
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#define PSTR_RETRIES 100
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#define PSTR_DELAY_US 10
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@ -39,12 +39,12 @@ static int rmobile_pd_power_down(struct generic_pm_domain *genpd)
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return ret;
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}
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if (__raw_readl(PSTR) & mask) {
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if (__raw_readl(rmobile_pd->base + PSTR) & mask) {
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unsigned int retry_count;
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__raw_writel(mask, SPDCR);
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__raw_writel(mask, rmobile_pd->base + SPDCR);
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for (retry_count = PSTR_RETRIES; retry_count; retry_count--) {
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if (!(__raw_readl(SPDCR) & mask))
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if (!(__raw_readl(rmobile_pd->base + SPDCR) & mask))
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break;
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cpu_relax();
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}
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@ -52,7 +52,8 @@ static int rmobile_pd_power_down(struct generic_pm_domain *genpd)
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if (!rmobile_pd->no_debug)
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pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n",
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genpd->name, mask, __raw_readl(PSTR));
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genpd->name, mask,
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__raw_readl(rmobile_pd->base + PSTR));
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return 0;
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}
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@ -64,13 +65,13 @@ static int __rmobile_pd_power_up(struct rmobile_pm_domain *rmobile_pd,
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unsigned int retry_count;
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int ret = 0;
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if (__raw_readl(PSTR) & mask)
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if (__raw_readl(rmobile_pd->base + PSTR) & mask)
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goto out;
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__raw_writel(mask, SWUCR);
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__raw_writel(mask, rmobile_pd->base + SWUCR);
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for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
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if (!(__raw_readl(SWUCR) & mask))
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if (!(__raw_readl(rmobile_pd->base + SWUCR) & mask))
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break;
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if (retry_count > PSTR_RETRIES)
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udelay(PSTR_DELAY_US);
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@ -82,7 +83,8 @@ static int __rmobile_pd_power_up(struct rmobile_pm_domain *rmobile_pd,
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if (!rmobile_pd->no_debug)
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pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n",
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rmobile_pd->genpd.name, mask, __raw_readl(PSTR));
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rmobile_pd->genpd.name, mask,
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__raw_readl(rmobile_pd->base + PSTR));
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out:
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if (ret == 0 && rmobile_pd->resume && do_resume)
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@ -21,6 +21,7 @@ struct rmobile_pm_domain {
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struct dev_power_governor *gov;
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int (*suspend)(void);
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void (*resume)(void);
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void __iomem *base;
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unsigned int bit_shift;
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bool no_debug;
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};
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@ -45,6 +45,8 @@
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#define PLLC01STPCR IOMEM(0xe61500c8)
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/* SYSC */
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#define SYSC_BASE IOMEM(0xe6180000)
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#define SBAR IOMEM(0xe6180020)
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#define WUPRMSK IOMEM(0xe6180028)
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#define WUPSMSK IOMEM(0xe618002c)
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@ -118,24 +120,28 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
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.genpd.name = "A4LC",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 1,
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},
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{
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.genpd.name = "A4MP",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 2,
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},
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{
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.genpd.name = "D4",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 3,
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},
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{
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.genpd.name = "A4R",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 5,
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.suspend = sh7372_a4r_pd_suspend,
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.resume = sh7372_intcs_resume,
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@ -144,18 +150,21 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
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.genpd.name = "A3RV",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 6,
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},
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{
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.genpd.name = "A3RI",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 8,
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},
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{
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.genpd.name = "A4S",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 10,
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.gov = &pm_domain_always_on_gov,
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.no_debug = true,
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@ -166,6 +175,7 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
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.genpd.name = "A3SP",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 11,
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.gov = &pm_domain_always_on_gov,
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.no_debug = true,
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@ -175,6 +185,7 @@ static struct rmobile_pm_domain sh7372_pm_domains[] = {
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.genpd.name = "A3SG",
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.genpd.power_on_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.genpd.power_off_latency_ns = PM_DOMAIN_ON_OFF_LATENCY_NS,
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.base = SYSC_BASE,
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.bit_shift = 13,
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},
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};
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