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powerpc/64s/radix: Fix preempt imbalance in TLB flush 

Fixes: 424de9c6e3 ("powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Nicholas Piggin 2017-10-24 23:06:52 +10:00 committed by Michael Ellerman
parent 158f19698b
commit 26e53d5ebe
1 changed files with 2 additions and 0 deletions
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2
arch/powerpc/mm/tlb-radix.c
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@ -360,12 +360,14 @@ void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr)
pid = mm ? mm->context.id : 0; pid = mm ? mm->context.id : 0;
preempt_disable();
if (unlikely(pid == MMU_NO_CONTEXT)) if (unlikely(pid == MMU_NO_CONTEXT))
goto no_context; goto no_context;
/* 4k page size, just blow the world */ /* 4k page size, just blow the world */
if (PAGE_SIZE == 0x1000) { if (PAGE_SIZE == 0x1000) {
radix__flush_all_mm(mm); radix__flush_all_mm(mm);
preempt_enable();
return; return;
} }