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Few fixes for omaps for v5.6-rc cycle 

This series of changes contains few code fixes for issues
 recently discovered:
 
 - A build fix for ARMv6 only configs when CONFIG_HAVE_ARM_SMCCC is
   not set
 
 - A fix for ti-sysc quirk handling for 1-wire hdq reset
 
 And a handful of dts fixes that I had queued up and should
 have already sent earlier instead of waiting for the code
 fixes to get sorted out:
 
 - Fix naming of vsys_3v3 regulator for dra7-evm
 
 - Fix incorrect OPP node names for am437x-idk-evm
 
 - Fix IPU1 mux clock parent source for dra7
 
 - Add missing PWM property for dra7 timers 13 to 16
 
 - Add missing dma-ranges for dra7 PCIe nodes
 
 - Fix mmc3 max-frequency for dra76x
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Merge tag 'omap-for-v5.6/fixes-rc3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Few fixes for omaps for v5.6-rc cycle

This series of changes contains few code fixes for issues
recently discovered:

- A build fix for ARMv6 only configs when CONFIG_HAVE_ARM_SMCCC is
  not set

- A fix for ti-sysc quirk handling for 1-wire hdq reset

And a handful of dts fixes that I had queued up and should
have already sent earlier instead of waiting for the code
fixes to get sorted out:

- Fix naming of vsys_3v3 regulator for dra7-evm

- Fix incorrect OPP node names for am437x-idk-evm

- Fix IPU1 mux clock parent source for dra7

- Add missing PWM property for dra7 timers 13 to 16

- Add missing dma-ranges for dra7 PCIe nodes

- Fix mmc3 max-frequency for dra76x

* tag 'omap-for-v5.6/fixes-rc3-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix compile if CONFIG_HAVE_ARM_SMCCC is not set
  arm: dts: dra76x: Fix mmc3 max-frequency
  ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes
  bus: ti-sysc: Fix 1-wire reset quirk
  ARM: dts: dra7-l4: mark timer13-16 as pwm capable
  ARM: dts: dra7xx-clocks: Fixup IPU1 mux clock parent source
  ARM: dts: am437x-idk-evm: Fix incorrect OPP node names
  ARM: dts: dra7-evm: Rename evm_3v3 regulator to vsys_3v3

Link: https://lore.kernel.org/r/pull-1582903541-589933@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-02-29 11:47:43 -08:00
parent f9a15f39e5 51c22d7b40
commit 27ad6129a2
9 changed files with 20 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/am437x-idk-evm.dts
View File

@ -526,11 +526,11 @@ &cpu0_opp_table {
* Supply voltage supervisor on board will not allow opp50 so
* disable it and set opp100 as suspend OPP.
*/
opp50@300000000 {
opp50-300000000 {
status = "disabled";
};
opp100@600000000 {
opp100-600000000 {
opp-suspend;
};
};

4
arch/arm/boot/dts/dra7-evm.dts
View File

@ -61,10 +61,10 @@ aic_dvdd: fixedregulator-aic_dvdd {
regulator-max-microvolt = <1800000>;
};
evm_3v3: fixedregulator-evm3v3 {
vsys_3v3: fixedregulator-vsys3v3 {
/* Output of Cntlr A of TPS43351-Q1 on dra7-evm */
compatible = "regulator-fixed";
regulator-name = "evm_3v3";
regulator-name = "vsys_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&evm_12v0>;

4
arch/arm/boot/dts/dra7-l4.dtsi
View File

@ -3474,6 +3474,7 @@ timer13: timer@0 {
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
};
@ -3501,6 +3502,7 @@ timer14: timer@0 {
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
};
@ -3528,6 +3530,7 @@ timer15: timer@0 {
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
};
@ -3555,6 +3558,7 @@ timer16: timer@0 {
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
};

2
arch/arm/boot/dts/dra7.dtsi
View File

@ -184,6 +184,7 @@ pcie1_rc: pcie@51000000 {
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
@ -238,6 +239,7 @@ pcie2_rc: pcie@51800000 {
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;

5
arch/arm/boot/dts/dra76x.dtsi
View File

@ -128,3 +128,8 @@ &rtctarget {
&usb4_tm {
status = "disabled";
};
&mmc3 {
/* dra76x is not affected by i887 */
max-frequency = <96000000>;
};

12
arch/arm/boot/dts/dra7xx-clocks.dtsi
View File

@ -796,16 +796,6 @@ video2_div_clk: video2_div_clk {
clock-div = <1>;
};
ipu1_gfclk_mux: ipu1_gfclk_mux@520 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>;
ti,bit-shift = <24>;
reg = <0x0520>;
assigned-clocks = <&ipu1_gfclk_mux>;
assigned-clock-parents = <&dpll_core_h22x2_ck>;
};
dummy_ck: dummy_ck {
#clock-cells = <0>;
compatible = "fixed-clock";
@ -1564,6 +1554,8 @@ ipu1_clkctrl: ipu1-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x4>;
#clock-cells = <2>;
assigned-clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 24>;
assigned-clock-parents = <&dpll_core_h22x2_ck>;
};
ipu_clkctrl: ipu-clkctrl@50 {

2
arch/arm/mach-omap2/Makefile
View File

@ -16,7 +16,7 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
clock-common = clock.o
secure-common = omap-smc.o omap-secure.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common) $(secure-common)

2
arch/arm/mach-omap2/io.c
View File

@ -431,7 +431,6 @@ void __init omap2420_init_early(void)
omap_hwmod_init_postsetup();
omap_clk_soc_init = omap2420_dt_clk_init;
rate_table = omap2420_rate_table;
omap_secure_init();
}
void __init omap2420_init_late(void)
@ -456,7 +455,6 @@ void __init omap2430_init_early(void)
omap_hwmod_init_postsetup();
omap_clk_soc_init = omap2430_dt_clk_init;
rate_table = omap2430_rate_table;
omap_secure_init();
}
void __init omap2430_init_late(void)

4
drivers/bus/ti-sysc.c
View File

@ -1400,7 +1400,7 @@ static void sysc_init_revision_quirks(struct sysc *ddata)
}
/* 1-wire needs module's internal clocks enabled for reset */
static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata)
static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
{
int offset = 0x0c; /* HDQ_CTRL_STATUS */
u16 val;
@ -1488,7 +1488,7 @@ static void sysc_init_module_quirks(struct sysc *ddata)
return;
if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w;
ddata->clk_disable_quirk = sysc_pre_reset_quirk_hdq1w;
return;
}