drm/amd/powerplay: delete code set/unset deep_sleep/power_containment.
they were controled by module parameter. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -221,9 +221,6 @@ static int cz_initialize_dpm_defaults(struct pp_hwmgr *hwmgr)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_NonABMSupportInPPLib);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SclkDeepSleep);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_DynamicM3Arbiter);
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@ -56,8 +56,6 @@ void fiji_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)
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fiji_hwmgr->power_tune_defaults = &fiji_power_tune_data_set_array[0];
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/* Assume disabled */
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_PowerContainment);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_CAC);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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@ -3621,9 +3621,6 @@ static int iceland_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
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data->engine_clock_data = 0;
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data->memory_clock_data = 0;
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SclkDeepSleep);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SclkDeepSleepAboveLow);
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@ -3847,8 +3844,7 @@ static int iceland_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
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PHM_PlatformCaps_GFXClockGatingManagedInCAIL);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_IcelandULPSSWWorkAround);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_PowerContainment);
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/* iceland doesn't support UVD and VCE */
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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