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ath10k: Extend CE src desc flags for interrupt indication 

QCA99X0 uses two new copy engine src desc flags for interrupt
indication. Bit_2 is to mark if host interrupt is disabled after
processing the current desc and bit_3 is to mark if target interrupt
is diabled after the processing of current descriptor.
CE_DESC_FLAGS_META_DATA_MASK and CE_DESC_FLAGS_META_DATA_LSB are based
on the target type.

Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Vasanthakumar Thiagarajan 2015-06-18 12:31:07 +05:30 committed by Kalle Valo
parent 6e4202c3ed
commit 2adf99ca33
4 changed files with 16 additions and 2 deletions
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1
drivers/net/wireless/ath/ath10k/ce.c
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@ -452,6 +452,7 @@ int ath10k_ce_completed_recv_next_nolock(struct ath10k_ce_pipe *ce_state,
{ {
struct ath10k_ce_ring *dest_ring = ce_state->dest_ring; struct ath10k_ce_ring *dest_ring = ce_state->dest_ring;
unsigned int nentries_mask = dest_ring->nentries_mask; unsigned int nentries_mask = dest_ring->nentries_mask;
struct ath10k *ar = ce_state->ar;
unsigned int sw_index = dest_ring->sw_index; unsigned int sw_index = dest_ring->sw_index;
struct ce_desc *base = dest_ring->base_addr_owner_space; struct ce_desc *base = dest_ring->base_addr_owner_space;

9
drivers/net/wireless/ath/ath10k/ce.h
View File

@ -38,8 +38,13 @@ struct ath10k_ce_pipe;
#define CE_DESC_FLAGS_GATHER (1 << 0) #define CE_DESC_FLAGS_GATHER (1 << 0)
#define CE_DESC_FLAGS_BYTE_SWAP (1 << 1) #define CE_DESC_FLAGS_BYTE_SWAP (1 << 1)
#define CE_DESC_FLAGS_META_DATA_MASK 0xFFFC
#define CE_DESC_FLAGS_META_DATA_LSB 2 /* Following desc flags are used in QCA99X0 */
#define CE_DESC_FLAGS_HOST_INT_DIS (1 << 2)
#define CE_DESC_FLAGS_TGT_INT_DIS (1 << 3)
#define CE_DESC_FLAGS_META_DATA_MASK ar->hw_values->ce_desc_meta_data_mask
#define CE_DESC_FLAGS_META_DATA_LSB ar->hw_values->ce_desc_meta_data_lsb
struct ce_desc { struct ce_desc {
__le32 addr; __le32 addr;

6
drivers/net/wireless/ath/ath10k/hw.c
View File

@ -114,6 +114,8 @@ const struct ath10k_hw_values qca988x_values = {
.ce_count = 8, .ce_count = 8,
.msi_assign_ce_max = 7, .msi_assign_ce_max = 7,
.num_target_ce_config_wlan = 7, .num_target_ce_config_wlan = 7,
.ce_desc_meta_data_mask = 0xFFFC,
.ce_desc_meta_data_lsb = 2,
}; };
const struct ath10k_hw_values qca6174_values = { const struct ath10k_hw_values qca6174_values = {
@ -121,6 +123,8 @@ const struct ath10k_hw_values qca6174_values = {
.ce_count = 8, .ce_count = 8,
.msi_assign_ce_max = 7, .msi_assign_ce_max = 7,
.num_target_ce_config_wlan = 7, .num_target_ce_config_wlan = 7,
.ce_desc_meta_data_mask = 0xFFFC,
.ce_desc_meta_data_lsb = 2,
}; };
const struct ath10k_hw_values qca99x0_values = { const struct ath10k_hw_values qca99x0_values = {
@ -128,6 +132,8 @@ const struct ath10k_hw_values qca99x0_values = {
.ce_count = 12, .ce_count = 12,
.msi_assign_ce_max = 12, .msi_assign_ce_max = 12,
.num_target_ce_config_wlan = 10, .num_target_ce_config_wlan = 10,
.ce_desc_meta_data_mask = 0xFFF0,
.ce_desc_meta_data_lsb = 4,
}; };
void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey, void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,

2
drivers/net/wireless/ath/ath10k/hw.h
View File

@ -195,6 +195,8 @@ struct ath10k_hw_values {
u8 ce_count; u8 ce_count;
u8 msi_assign_ce_max; u8 msi_assign_ce_max;
u8 num_target_ce_config_wlan; u8 num_target_ce_config_wlan;
u16 ce_desc_meta_data_mask;
u8 ce_desc_meta_data_lsb;
}; };
extern const struct ath10k_hw_values qca988x_values; extern const struct ath10k_hw_values qca988x_values;