drm/nouveau/mc: cosmetic changes
This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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c7750cfbc1
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2ca0ddbc03
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@ -3,7 +3,7 @@
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#include <core/subdev.h>
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struct nvkm_mc {
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struct nvkm_subdev base;
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struct nvkm_subdev subdev;
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bool use_msi;
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unsigned int irq;
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void (*unk260)(struct nvkm_mc *, u32);
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@ -26,17 +26,17 @@
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#include <core/option.h>
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static inline void
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nvkm_mc_unk260(struct nvkm_mc *pmc, u32 data)
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nvkm_mc_unk260(struct nvkm_mc *mc, u32 data)
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{
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const struct nvkm_mc_oclass *impl = (void *)nv_oclass(pmc);
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const struct nvkm_mc_oclass *impl = (void *)nv_oclass(mc);
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if (impl->unk260)
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impl->unk260(pmc, data);
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impl->unk260(mc, data);
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}
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static inline u32
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nvkm_mc_intr_mask(struct nvkm_mc *pmc)
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nvkm_mc_intr_mask(struct nvkm_mc *mc)
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{
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u32 intr = nv_rd32(pmc, 0x000100);
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u32 intr = nv_rd32(mc, 0x000100);
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if (intr == 0xffffffff) /* likely fallen off the bus */
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intr = 0x00000000;
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return intr;
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@ -45,23 +45,23 @@ nvkm_mc_intr_mask(struct nvkm_mc *pmc)
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static irqreturn_t
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nvkm_mc_intr(int irq, void *arg)
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{
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struct nvkm_mc *pmc = arg;
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const struct nvkm_mc_oclass *oclass = (void *)nv_object(pmc)->oclass;
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struct nvkm_mc *mc = arg;
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const struct nvkm_mc_oclass *oclass = (void *)nv_object(mc)->oclass;
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const struct nvkm_mc_intr *map = oclass->intr;
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struct nvkm_subdev *unit;
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u32 intr;
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nv_wr32(pmc, 0x000140, 0x00000000);
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nv_rd32(pmc, 0x000140);
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intr = nvkm_mc_intr_mask(pmc);
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if (pmc->use_msi)
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oclass->msi_rearm(pmc);
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nv_wr32(mc, 0x000140, 0x00000000);
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nv_rd32(mc, 0x000140);
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intr = nvkm_mc_intr_mask(mc);
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if (mc->use_msi)
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oclass->msi_rearm(mc);
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if (intr) {
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u32 stat = intr = nvkm_mc_intr_mask(pmc);
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u32 stat = intr = nvkm_mc_intr_mask(mc);
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while (map->stat) {
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if (intr & map->stat) {
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unit = nvkm_subdev(pmc, map->unit);
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unit = nvkm_subdev(mc, map->unit);
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if (unit && unit->intr)
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unit->intr(unit);
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stat &= ~map->stat;
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@ -70,29 +70,29 @@ nvkm_mc_intr(int irq, void *arg)
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}
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if (stat)
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nv_error(pmc, "unknown intr 0x%08x\n", stat);
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nv_error(mc, "unknown intr 0x%08x\n", stat);
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}
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nv_wr32(pmc, 0x000140, 0x00000001);
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nv_wr32(mc, 0x000140, 0x00000001);
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return intr ? IRQ_HANDLED : IRQ_NONE;
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}
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int
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_nvkm_mc_fini(struct nvkm_object *object, bool suspend)
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{
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struct nvkm_mc *pmc = (void *)object;
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nv_wr32(pmc, 0x000140, 0x00000000);
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return nvkm_subdev_fini(&pmc->base, suspend);
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struct nvkm_mc *mc = (void *)object;
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nv_wr32(mc, 0x000140, 0x00000000);
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return nvkm_subdev_fini(&mc->subdev, suspend);
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}
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int
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_nvkm_mc_init(struct nvkm_object *object)
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{
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struct nvkm_mc *pmc = (void *)object;
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int ret = nvkm_subdev_init(&pmc->base);
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struct nvkm_mc *mc = (void *)object;
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int ret = nvkm_subdev_init(&mc->subdev);
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if (ret)
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return ret;
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nv_wr32(pmc, 0x000140, 0x00000001);
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nv_wr32(mc, 0x000140, 0x00000001);
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return 0;
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}
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@ -100,11 +100,11 @@ void
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_nvkm_mc_dtor(struct nvkm_object *object)
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{
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struct nvkm_device *device = nv_device(object);
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struct nvkm_mc *pmc = (void *)object;
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free_irq(pmc->irq, pmc);
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if (pmc->use_msi)
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struct nvkm_mc *mc = (void *)object;
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free_irq(mc->irq, mc);
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if (mc->use_msi)
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pci_disable_msi(device->pdev);
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nvkm_subdev_destroy(&pmc->base);
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nvkm_subdev_destroy(&mc->subdev);
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}
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int
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@ -113,16 +113,16 @@ nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine,
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{
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const struct nvkm_mc_oclass *oclass = (void *)bclass;
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struct nvkm_device *device = nv_device(parent);
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struct nvkm_mc *pmc;
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struct nvkm_mc *mc;
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int ret;
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ret = nvkm_subdev_create_(parent, engine, bclass, 0, "PMC",
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"master", length, pobject);
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pmc = *pobject;
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mc = *pobject;
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if (ret)
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return ret;
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pmc->unk260 = nvkm_mc_unk260;
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mc->unk260 = nvkm_mc_unk260;
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if (nv_device_is_pci(device)) {
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switch (device->pdev->device & 0x0ff0) {
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@ -136,31 +136,31 @@ nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine,
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/* reported broken, nv also disable it */
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break;
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default:
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pmc->use_msi = true;
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mc->use_msi = true;
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break;
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}
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}
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pmc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI",
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pmc->use_msi);
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mc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI",
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mc->use_msi);
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if (pmc->use_msi && oclass->msi_rearm) {
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pmc->use_msi = pci_enable_msi(device->pdev) == 0;
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if (pmc->use_msi) {
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nv_info(pmc, "MSI interrupts enabled\n");
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oclass->msi_rearm(pmc);
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if (mc->use_msi && oclass->msi_rearm) {
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mc->use_msi = pci_enable_msi(device->pdev) == 0;
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if (mc->use_msi) {
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nv_info(mc, "MSI interrupts enabled\n");
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oclass->msi_rearm(mc);
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}
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} else {
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pmc->use_msi = false;
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mc->use_msi = false;
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}
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}
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ret = nv_device_get_irq(device, true);
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if (ret < 0)
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return ret;
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pmc->irq = ret;
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mc->irq = ret;
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ret = request_irq(pmc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", pmc);
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ret = request_irq(mc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", mc);
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if (ret < 0)
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return ret;
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@ -49,16 +49,15 @@ gf100_mc_intr[] = {
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};
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static void
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gf100_mc_msi_rearm(struct nvkm_mc *pmc)
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gf100_mc_msi_rearm(struct nvkm_mc *mc)
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{
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struct nv04_mc_priv *priv = (void *)pmc;
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nv_wr32(priv, 0x088704, 0x00000000);
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nv_wr32(mc, 0x088704, 0x00000000);
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}
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void
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gf100_mc_unk260(struct nvkm_mc *pmc, u32 data)
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gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
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{
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nv_wr32(pmc, 0x000260, data);
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nv_wr32(mc, 0x000260, data);
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}
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struct nvkm_oclass *
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@ -41,12 +41,12 @@ nv04_mc_intr[] = {
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int
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nv04_mc_init(struct nvkm_object *object)
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{
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struct nv04_mc_priv *priv = (void *)object;
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struct nvkm_mc *mc = (void *)object;
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nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
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nv_wr32(priv, 0x001850, 0x00000001); /* disable rom access */
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nv_wr32(mc, 0x000200, 0xffffffff); /* everything enabled */
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nv_wr32(mc, 0x001850, 0x00000001); /* disable rom access */
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return nvkm_mc_init(&priv->base);
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return nvkm_mc_init(mc);
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}
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int
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct nv04_mc_priv *priv;
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struct nvkm_mc *mc;
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int ret;
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ret = nvkm_mc_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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ret = nvkm_mc_create(parent, engine, oclass, &mc);
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*pobject = nv_object(mc);
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if (ret)
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return ret;
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@ -2,10 +2,6 @@
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#define __NVKM_MC_NV04_H__
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#include "priv.h"
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struct nv04_mc_priv {
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struct nvkm_mc base;
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};
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int nv04_mc_ctor(struct nvkm_object *, struct nvkm_object *,
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struct nvkm_oclass *, void *, u32,
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struct nvkm_object **);
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@ -24,10 +24,9 @@
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#include "nv04.h"
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void
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nv40_mc_msi_rearm(struct nvkm_mc *pmc)
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nv40_mc_msi_rearm(struct nvkm_mc *mc)
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{
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struct nv04_mc_priv *priv = (void *)pmc;
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nv_wr08(priv, 0x088068, 0xff);
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nv_wr08(mc, 0x088068, 0xff);
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}
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struct nvkm_oclass *
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@ -26,17 +26,17 @@
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int
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nv44_mc_init(struct nvkm_object *object)
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{
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struct nv04_mc_priv *priv = (void *)object;
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u32 tmp = nv_rd32(priv, 0x10020c);
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struct nvkm_mc *mc = (void *)object;
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u32 tmp = nv_rd32(mc, 0x10020c);
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nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
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nv_wr32(mc, 0x000200, 0xffffffff); /* everything enabled */
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nv_wr32(priv, 0x001700, tmp);
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nv_wr32(priv, 0x001704, 0);
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nv_wr32(priv, 0x001708, 0);
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nv_wr32(priv, 0x00170c, tmp);
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nv_wr32(mc, 0x001700, tmp);
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nv_wr32(mc, 0x001704, 0);
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nv_wr32(mc, 0x001708, 0);
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nv_wr32(mc, 0x00170c, tmp);
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return nvkm_mc_init(&priv->base);
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return nvkm_mc_init(mc);
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}
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struct nvkm_oclass *
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@ -42,18 +42,18 @@ nv50_mc_intr[] = {
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};
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static void
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nv50_mc_msi_rearm(struct nvkm_mc *pmc)
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nv50_mc_msi_rearm(struct nvkm_mc *mc)
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{
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struct nvkm_device *device = nv_device(pmc);
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struct nvkm_device *device = nv_device(mc);
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pci_write_config_byte(device->pdev, 0x68, 0xff);
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}
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int
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nv50_mc_init(struct nvkm_object *object)
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{
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struct nv04_mc_priv *priv = (void *)object;
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nv_wr32(priv, 0x000200, 0xffffffff); /* everything on */
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return nvkm_mc_init(&priv->base);
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struct nvkm_mc *mc = (void *)object;
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nv_wr32(mc, 0x000200, 0xffffffff); /* everything on */
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return nvkm_mc_init(mc);
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}
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struct nvkm_oclass *
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