nvmem: Broaden the selection of NVMEM_SNVS_LPGPR
The SNVS LPGR IP block is also found on other i.MX SoCs that are not covered by the current SOC_IMX6 || SOC_IMX7D logic. One example is the i.MX7ULP. To avoid keep expanding the SoC logic selection, make it broader by using the more generic ARCH_MXC symbol instead. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -195,7 +195,7 @@ config MESON_MX_EFUSE
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config NVMEM_SNVS_LPGPR
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tristate "Support for Low Power General Purpose Register"
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depends on SOC_IMX6 || SOC_IMX7D || COMPILE_TEST
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depends on ARCH_MXC || COMPILE_TEST
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help
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This is a driver for Low Power General Purpose Register (LPGPR) available on
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i.MX6 and i.MX7 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.
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