drm/i915: replace platform flags with a platform enum
The platform flags in device info are (mostly) mutually exclusive. Replace the flags with an enum. Add the platform enum also for platforms that previously didn't have a flag, and give them codename logging in dmesg. Pineview remains an exception, the platform being G33 for that. v2: Sort enum by gen and date v3: rebase on geminilake enabling Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1480596595-3278-1-git-send-email-jani.nikula@intel.com
This commit is contained in:
parent
c499af5a69
commit
2e0d26f866
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@ -77,6 +77,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
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const struct intel_device_info *info = INTEL_INFO(dev_priv);
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seq_printf(m, "gen: %d\n", INTEL_GEN(dev_priv));
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seq_printf(m, "platform: %s\n", intel_platform_name(info->platform));
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seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev_priv));
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#define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
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DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG);
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@ -687,25 +687,8 @@ struct intel_csr {
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};
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#define DEV_INFO_FOR_EACH_FLAG(func) \
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/* Keep is_* in chronological order */ \
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func(is_mobile); \
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func(is_i85x); \
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func(is_i915g); \
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func(is_i945gm); \
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func(is_g33); \
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func(is_g4x); \
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func(is_pineview); \
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func(is_broadwater); \
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func(is_crestline); \
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func(is_ivybridge); \
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func(is_valleyview); \
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func(is_cherryview); \
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func(is_haswell); \
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func(is_broadwell); \
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func(is_skylake); \
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func(is_broxton); \
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func(is_geminilake); \
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func(is_kabylake); \
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func(is_lp); \
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func(is_alpha_support); \
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/* Keep has_* in alphabetical order */ \
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@ -759,6 +742,35 @@ static inline unsigned int sseu_subslice_total(const struct sseu_dev_info *sseu)
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return hweight8(sseu->slice_mask) * hweight8(sseu->subslice_mask);
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}
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/* Keep in gen based order, and chronological order within a gen */
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enum intel_platform {
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INTEL_PLATFORM_UNINITIALIZED = 0,
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INTEL_I830,
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INTEL_I845G,
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INTEL_I85X,
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INTEL_I865G,
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INTEL_I915G,
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INTEL_I915GM,
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INTEL_I945G,
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INTEL_I945GM,
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INTEL_G33,
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INTEL_PINEVIEW,
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INTEL_BROADWATER,
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INTEL_CRESTLINE,
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INTEL_G4X,
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INTEL_IRONLAKE,
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INTEL_SANDYBRIDGE,
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INTEL_IVYBRIDGE,
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INTEL_VALLEYVIEW,
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INTEL_HASWELL,
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INTEL_BROADWELL,
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INTEL_CHERRYVIEW,
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INTEL_SKYLAKE,
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INTEL_BROXTON,
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INTEL_KABYLAKE,
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INTEL_GEMINILAKE,
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};
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struct intel_device_info {
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u32 display_mmio_offset;
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u16 device_id;
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@ -766,6 +778,7 @@ struct intel_device_info {
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u8 num_sprites[I915_MAX_PIPES];
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u8 gen;
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u16 gen_mask;
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enum intel_platform platform;
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u8 ring_mask; /* Rings supported by the HW */
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u8 num_rings;
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#define DEFINE_FLAG(name) u8 name:1
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@ -2503,33 +2516,33 @@ intel_info(const struct drm_i915_private *dev_priv)
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#define IS_I830(dev_priv) (INTEL_DEVID(dev_priv) == 0x3577)
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#define IS_845G(dev_priv) (INTEL_DEVID(dev_priv) == 0x2562)
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#define IS_I85X(dev_priv) ((dev_priv)->info.is_i85x)
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#define IS_I85X(dev_priv) ((dev_priv)->info.platform == INTEL_I85X)
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#define IS_I865G(dev_priv) (INTEL_DEVID(dev_priv) == 0x2572)
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#define IS_I915G(dev_priv) ((dev_priv)->info.is_i915g)
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#define IS_I915G(dev_priv) ((dev_priv)->info.platform == INTEL_I915G)
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#define IS_I915GM(dev_priv) (INTEL_DEVID(dev_priv) == 0x2592)
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#define IS_I945G(dev_priv) (INTEL_DEVID(dev_priv) == 0x2772)
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#define IS_I945GM(dev_priv) ((dev_priv)->info.is_i945gm)
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#define IS_BROADWATER(dev_priv) ((dev_priv)->info.is_broadwater)
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#define IS_CRESTLINE(dev_priv) ((dev_priv)->info.is_crestline)
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#define IS_I945GM(dev_priv) ((dev_priv)->info.platform == INTEL_I945GM)
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#define IS_BROADWATER(dev_priv) ((dev_priv)->info.platform == INTEL_BROADWATER)
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#define IS_CRESTLINE(dev_priv) ((dev_priv)->info.platform == INTEL_CRESTLINE)
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#define IS_GM45(dev_priv) (INTEL_DEVID(dev_priv) == 0x2A42)
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#define IS_G4X(dev_priv) ((dev_priv)->info.is_g4x)
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#define IS_G4X(dev_priv) ((dev_priv)->info.platform == INTEL_G4X)
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#define IS_PINEVIEW_G(dev_priv) (INTEL_DEVID(dev_priv) == 0xa001)
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#define IS_PINEVIEW_M(dev_priv) (INTEL_DEVID(dev_priv) == 0xa011)
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#define IS_PINEVIEW(dev_priv) ((dev_priv)->info.is_pineview)
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#define IS_G33(dev_priv) ((dev_priv)->info.is_g33)
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#define IS_G33(dev_priv) ((dev_priv)->info.platform == INTEL_G33)
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#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
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#define IS_IVYBRIDGE(dev_priv) ((dev_priv)->info.is_ivybridge)
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#define IS_IVYBRIDGE(dev_priv) ((dev_priv)->info.platform == INTEL_IVYBRIDGE)
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#define IS_IVB_GT1(dev_priv) (INTEL_DEVID(dev_priv) == 0x0156 || \
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INTEL_DEVID(dev_priv) == 0x0152 || \
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INTEL_DEVID(dev_priv) == 0x015a)
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#define IS_VALLEYVIEW(dev_priv) ((dev_priv)->info.is_valleyview)
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#define IS_CHERRYVIEW(dev_priv) ((dev_priv)->info.is_cherryview)
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#define IS_HASWELL(dev_priv) ((dev_priv)->info.is_haswell)
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#define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
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#define IS_SKYLAKE(dev_priv) ((dev_priv)->info.is_skylake)
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#define IS_BROXTON(dev_priv) ((dev_priv)->info.is_broxton)
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#define IS_GEMINILAKE(dev_priv) ((dev_priv)->info.is_geminilake)
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#define IS_KABYLAKE(dev_priv) ((dev_priv)->info.is_kabylake)
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#define IS_VALLEYVIEW(dev_priv) ((dev_priv)->info.platform == INTEL_VALLEYVIEW)
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#define IS_CHERRYVIEW(dev_priv) ((dev_priv)->info.platform == INTEL_CHERRYVIEW)
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#define IS_HASWELL(dev_priv) ((dev_priv)->info.platform == INTEL_HASWELL)
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#define IS_BROADWELL(dev_priv) ((dev_priv)->info.platform == INTEL_BROADWELL)
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#define IS_SKYLAKE(dev_priv) ((dev_priv)->info.platform == INTEL_SKYLAKE)
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#define IS_BROXTON(dev_priv) ((dev_priv)->info.platform == INTEL_BROXTON)
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#define IS_KABYLAKE(dev_priv) ((dev_priv)->info.platform == INTEL_KABYLAKE)
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#define IS_GEMINILAKE(dev_priv) ((dev_priv)->info.platform == INTEL_GEMINILAKE)
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#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
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#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
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(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
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@ -3563,6 +3576,7 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
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return (struct intel_device_info *)&dev_priv->info;
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}
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const char *intel_platform_name(enum intel_platform platform);
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void intel_device_info_runtime_init(struct drm_i915_private *dev_priv);
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void intel_device_info_dump(struct drm_i915_private *dev_priv);
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@ -571,6 +571,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
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}
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err_printf(m, "Reset count: %u\n", error->reset_count);
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err_printf(m, "Suspend count: %u\n", error->suspend_count);
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err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
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err_printf(m, "PCI ID: 0x%04x\n", pdev->device);
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err_printf(m, "PCI Revision: 0x%02x\n", pdev->revision);
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err_printf(m, "PCI Subsystem: %04x:%04x\n",
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@ -65,17 +65,19 @@
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static const struct intel_device_info intel_i830_info = {
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GEN2_FEATURES,
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.platform = INTEL_I830,
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.is_mobile = 1, .cursor_needs_physical = 1,
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.num_pipes = 2, /* legal, last one wins */
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};
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static const struct intel_device_info intel_845g_info = {
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GEN2_FEATURES,
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.platform = INTEL_I845G,
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};
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static const struct intel_device_info intel_i85x_info = {
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GEN2_FEATURES,
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.is_i85x = 1, .is_mobile = 1,
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.platform = INTEL_I85X, .is_mobile = 1,
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.num_pipes = 2, /* legal, last one wins */
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.cursor_needs_physical = 1,
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.has_fbc = 1,
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@ -83,6 +85,7 @@ static const struct intel_device_info intel_i85x_info = {
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static const struct intel_device_info intel_i865g_info = {
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GEN2_FEATURES,
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.platform = INTEL_I865G,
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};
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#define GEN3_FEATURES \
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@ -94,12 +97,13 @@ static const struct intel_device_info intel_i865g_info = {
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static const struct intel_device_info intel_i915g_info = {
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GEN3_FEATURES,
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.is_i915g = 1, .cursor_needs_physical = 1,
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.platform = INTEL_I915G, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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.hws_needs_physical = 1,
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};
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static const struct intel_device_info intel_i915gm_info = {
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GEN3_FEATURES,
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.platform = INTEL_I915GM,
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.is_mobile = 1,
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.cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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@ -109,13 +113,14 @@ static const struct intel_device_info intel_i915gm_info = {
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};
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static const struct intel_device_info intel_i945g_info = {
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GEN3_FEATURES,
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.platform = INTEL_I945G,
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.has_hotplug = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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.hws_needs_physical = 1,
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};
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static const struct intel_device_info intel_i945gm_info = {
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GEN3_FEATURES,
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.is_i945gm = 1, .is_mobile = 1,
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.platform = INTEL_I945GM, .is_mobile = 1,
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.has_hotplug = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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.supports_tv = 1,
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@ -133,14 +138,14 @@ static const struct intel_device_info intel_i945gm_info = {
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static const struct intel_device_info intel_i965g_info = {
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GEN4_FEATURES,
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.is_broadwater = 1,
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.platform = INTEL_BROADWATER,
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.has_overlay = 1,
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.hws_needs_physical = 1,
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};
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static const struct intel_device_info intel_i965gm_info = {
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GEN4_FEATURES,
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.is_crestline = 1,
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.platform = INTEL_CRESTLINE,
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.is_mobile = 1, .has_fbc = 1,
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.has_overlay = 1,
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.supports_tv = 1,
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@ -149,21 +154,21 @@ static const struct intel_device_info intel_i965gm_info = {
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static const struct intel_device_info intel_g33_info = {
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GEN3_FEATURES,
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.is_g33 = 1,
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.platform = INTEL_G33,
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.has_hotplug = 1,
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.has_overlay = 1,
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};
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static const struct intel_device_info intel_g45_info = {
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GEN4_FEATURES,
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.is_g4x = 1,
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.platform = INTEL_G4X,
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.has_pipe_cxsr = 1,
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.ring_mask = RENDER_RING | BSD_RING,
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};
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static const struct intel_device_info intel_gm45_info = {
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GEN4_FEATURES,
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.is_g4x = 1,
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.platform = INTEL_G4X,
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.is_mobile = 1, .has_fbc = 1,
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.has_pipe_cxsr = 1,
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.supports_tv = 1,
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@ -172,7 +177,7 @@ static const struct intel_device_info intel_gm45_info = {
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static const struct intel_device_info intel_pineview_info = {
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GEN3_FEATURES,
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.is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
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.platform = INTEL_G33, .is_pineview = 1, .is_mobile = 1,
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.has_hotplug = 1,
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.has_overlay = 1,
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};
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@ -187,10 +192,12 @@ static const struct intel_device_info intel_pineview_info = {
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static const struct intel_device_info intel_ironlake_d_info = {
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GEN5_FEATURES,
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.platform = INTEL_IRONLAKE,
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};
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static const struct intel_device_info intel_ironlake_m_info = {
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GEN5_FEATURES,
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.platform = INTEL_IRONLAKE,
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.is_mobile = 1,
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};
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@ -210,10 +217,12 @@ static const struct intel_device_info intel_ironlake_m_info = {
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static const struct intel_device_info intel_sandybridge_d_info = {
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GEN6_FEATURES,
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.platform = INTEL_SANDYBRIDGE,
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};
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static const struct intel_device_info intel_sandybridge_m_info = {
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GEN6_FEATURES,
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.platform = INTEL_SANDYBRIDGE,
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.is_mobile = 1,
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};
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@ -234,20 +243,20 @@ static const struct intel_device_info intel_sandybridge_m_info = {
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static const struct intel_device_info intel_ivybridge_d_info = {
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GEN7_FEATURES,
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.is_ivybridge = 1,
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.platform = INTEL_IVYBRIDGE,
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.has_l3_dpf = 1,
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};
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static const struct intel_device_info intel_ivybridge_m_info = {
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GEN7_FEATURES,
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.is_ivybridge = 1,
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.platform = INTEL_IVYBRIDGE,
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.is_mobile = 1,
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.has_l3_dpf = 1,
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};
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static const struct intel_device_info intel_ivybridge_q_info = {
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GEN7_FEATURES,
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.is_ivybridge = 1,
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.platform = INTEL_IVYBRIDGE,
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.num_pipes = 0, /* legal, last one wins */
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.has_l3_dpf = 1,
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};
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@ -270,7 +279,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
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static const struct intel_device_info intel_valleyview_info = {
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VLV_FEATURES,
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.is_valleyview = 1,
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.platform = INTEL_VALLEYVIEW,
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};
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#define HSW_FEATURES \
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@ -286,7 +295,7 @@ static const struct intel_device_info intel_valleyview_info = {
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static const struct intel_device_info intel_haswell_info = {
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HSW_FEATURES,
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.is_haswell = 1,
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.platform = INTEL_HASWELL,
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.has_l3_dpf = 1,
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};
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@ -300,13 +309,13 @@ static const struct intel_device_info intel_haswell_info = {
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static const struct intel_device_info intel_broadwell_info = {
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BDW_FEATURES,
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.gen = 8,
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.is_broadwell = 1,
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.platform = INTEL_BROADWELL,
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};
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static const struct intel_device_info intel_broadwell_gt3_info = {
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BDW_FEATURES,
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.gen = 8,
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.is_broadwell = 1,
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.platform = INTEL_BROADWELL,
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.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
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};
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@ -314,7 +323,7 @@ static const struct intel_device_info intel_cherryview_info = {
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.gen = 8, .num_pipes = 3,
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.has_hotplug = 1,
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.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
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.is_cherryview = 1,
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.platform = INTEL_CHERRYVIEW,
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.has_64bit_reloc = 1,
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.has_psr = 1,
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.has_runtime_pm = 1,
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@ -334,7 +343,7 @@ static const struct intel_device_info intel_cherryview_info = {
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static const struct intel_device_info intel_skylake_info = {
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BDW_FEATURES,
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.is_skylake = 1,
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.platform = INTEL_SKYLAKE,
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.gen = 9,
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.has_csr = 1,
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.has_guc = 1,
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@ -343,7 +352,7 @@ static const struct intel_device_info intel_skylake_info = {
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static const struct intel_device_info intel_skylake_gt3_info = {
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BDW_FEATURES,
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.is_skylake = 1,
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.platform = INTEL_SKYLAKE,
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.gen = 9,
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.has_csr = 1,
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.has_guc = 1,
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||||
|
@ -380,21 +389,21 @@ static const struct intel_device_info intel_skylake_gt3_info = {
|
|||
BDW_COLORS
|
||||
|
||||
static const struct intel_device_info intel_broxton_info = {
|
||||
.is_broxton = 1,
|
||||
GEN9_LP_FEATURES,
|
||||
.platform = INTEL_BROXTON,
|
||||
.ddb_size = 512,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_geminilake_info = {
|
||||
.is_alpha_support = 1,
|
||||
.is_geminilake = 1,
|
||||
GEN9_LP_FEATURES,
|
||||
.platform = INTEL_GEMINILAKE,
|
||||
.is_alpha_support = 1,
|
||||
.ddb_size = 1024,
|
||||
};
|
||||
|
||||
static const struct intel_device_info intel_kabylake_info = {
|
||||
BDW_FEATURES,
|
||||
.is_kabylake = 1,
|
||||
.platform = INTEL_KABYLAKE,
|
||||
.gen = 9,
|
||||
.has_csr = 1,
|
||||
.has_guc = 1,
|
||||
|
@ -403,7 +412,7 @@ static const struct intel_device_info intel_kabylake_info = {
|
|||
|
||||
static const struct intel_device_info intel_kabylake_gt3_info = {
|
||||
BDW_FEATURES,
|
||||
.is_kabylake = 1,
|
||||
.platform = INTEL_KABYLAKE,
|
||||
.gen = 9,
|
||||
.has_csr = 1,
|
||||
.has_guc = 1,
|
||||
|
|
|
@ -24,11 +24,50 @@
|
|||
|
||||
#include "i915_drv.h"
|
||||
|
||||
#define PLATFORM_NAME(x) [INTEL_##x] = #x
|
||||
static const char * const platform_names[] = {
|
||||
PLATFORM_NAME(I830),
|
||||
PLATFORM_NAME(I845G),
|
||||
PLATFORM_NAME(I85X),
|
||||
PLATFORM_NAME(I865G),
|
||||
PLATFORM_NAME(I915G),
|
||||
PLATFORM_NAME(I915GM),
|
||||
PLATFORM_NAME(I945G),
|
||||
PLATFORM_NAME(I945GM),
|
||||
PLATFORM_NAME(G33),
|
||||
PLATFORM_NAME(PINEVIEW),
|
||||
PLATFORM_NAME(BROADWATER),
|
||||
PLATFORM_NAME(CRESTLINE),
|
||||
PLATFORM_NAME(G4X),
|
||||
PLATFORM_NAME(IRONLAKE),
|
||||
PLATFORM_NAME(SANDYBRIDGE),
|
||||
PLATFORM_NAME(IVYBRIDGE),
|
||||
PLATFORM_NAME(VALLEYVIEW),
|
||||
PLATFORM_NAME(HASWELL),
|
||||
PLATFORM_NAME(BROADWELL),
|
||||
PLATFORM_NAME(CHERRYVIEW),
|
||||
PLATFORM_NAME(SKYLAKE),
|
||||
PLATFORM_NAME(BROXTON),
|
||||
PLATFORM_NAME(KABYLAKE),
|
||||
PLATFORM_NAME(GEMINILAKE),
|
||||
};
|
||||
#undef PLATFORM_NAME
|
||||
|
||||
const char *intel_platform_name(enum intel_platform platform)
|
||||
{
|
||||
if (WARN_ON_ONCE(platform >= ARRAY_SIZE(platform_names) ||
|
||||
platform_names[platform] == NULL))
|
||||
return "<unknown>";
|
||||
|
||||
return platform_names[platform];
|
||||
}
|
||||
|
||||
void intel_device_info_dump(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
const struct intel_device_info *info = &dev_priv->info;
|
||||
|
||||
DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x rev=0x%02x",
|
||||
DRM_DEBUG_DRIVER("i915 device info: platform=%s gen=%i pciid=0x%04x rev=0x%02x",
|
||||
intel_platform_name(info->platform),
|
||||
info->gen,
|
||||
dev_priv->drm.pdev->device,
|
||||
dev_priv->drm.pdev->revision);
|
||||
|
|
Loading…
Reference in New Issue