drm/doc: Appease sphinx

Mostly this is unexpected indents. But really it's just a
demonstration for my patch, all these issues have been found&fixed
using the correct source file and line number support I just added.
All line numbers have been perfectly accurate.

One issue looked a bit fishy in intel_lrc.c, where I don't quite grok
what sphinx is unhappy about. But since that file looks like it has
never seen a proper kernel-doc parser I figured better to fix in a
separate path.

v2: Use fancy new &drm_device->struct_mutex linking (Jani).

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: linux-doc@vger.kernel.org
Cc: Jonathan Corbet <corbet@lwn.net>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

drivers/gpu/drm/drm_gem.c

@@ -787,7 +787,7 @@ EXPORT_SYMBOL(drm_gem_object_release);
  * @kref: kref of the object to free
  *
  * Called after the last reference to the object has been lost.
- * Must be called holding struct_ mutex
+ * Must be called holding &drm_device->struct_mutex.
  *
  * Frees the object
  */

drivers/gpu/drm/drm_modes.c

@@ -544,6 +544,7 @@ EXPORT_SYMBOL(drm_gtf_mode_complex);
  *
  * This function is to create the modeline based on the GTF algorithm.
  * Generalized Timing Formula is derived from:
+ *
  *	GTF Spreadsheet by Andy Morrish (1/5/97)
  *	available at http://www.vesa.org
  *

drivers/gpu/drm/drm_plane_helper.c

@@ -219,10 +219,12 @@ EXPORT_SYMBOL(drm_plane_helper_check_update);
  *
  * Note that we make some assumptions about hardware limitations that may not be
  * true for all hardware --
- *   1) Primary plane cannot be repositioned.
+ *
- *   2) Primary plane cannot be scaled.
+ * 1. Primary plane cannot be repositioned.
- *   3) Primary plane must cover the entire CRTC.
+ * 2. Primary plane cannot be scaled.
- *   4) Subpixel positioning is not supported.
+ * 3. Primary plane must cover the entire CRTC.
+ * 4. Subpixel positioning is not supported.
+ *
  * Drivers for hardware that don't have these restrictions can provide their
  * own implementation rather than using this helper.
  *

drivers/gpu/drm/i915/intel_dp.c

@@ -5214,14 +5214,14 @@ void intel_edp_drrs_flush(struct drm_device *dev,
  *
  * DRRS saves power by switching to low RR based on usage scenarios.
  *
- * eDP DRRS:-
+ * The implementation is based on frontbuffer tracking implementation.  When
- *        The implementation is based on frontbuffer tracking implementation.
+ * there is a disturbance on the screen triggered by user activity or a periodic
- * When there is a disturbance on the screen triggered by user activity or a
+ * system activity, DRRS is disabled (RR is changed to high RR).  When there is
- * periodic system activity, DRRS is disabled (RR is changed to high RR).
+ * no movement on screen, after a timeout of 1 second, a switch to low RR is
- * When there is no movement on screen, after a timeout of 1 second, a switch
+ * made.
- * to low RR is made.
+ *
- *        For integration with frontbuffer tracking code,
+ * For integration with frontbuffer tracking code, intel_edp_drrs_invalidate()
- * intel_edp_drrs_invalidate() and intel_edp_drrs_flush() are called.
+ * and intel_edp_drrs_flush() are called.
  *
  * DRRS can be further extended to support other internal panels and also
  * the scenario of video playback wherein RR is set based on the rate

drivers/gpu/drm/i915/intel_fbc.c

@@ -374,6 +374,7 @@ static void intel_fbc_hw_deactivate(struct drm_i915_private *dev_priv)
  * @dev_priv: i915 device instance
  *
  * This function is used to verify the current state of FBC.
+ *
  * FIXME: This should be tracked in the plane config eventually
  * instead of queried at runtime for most callers.
  */