net-next: mediatek: add platform data to adapt into various hardware
This patch is the preparation patch in order to adapt into various hardware through adding platform data which holds specific characteristics among MediaTek SoCs and introducing the unified clock handler for those distinct clock requirements depending on different features such as TRGMII and SGMII getting support on the target SoC. And finally, add enhancement with given the generic description for Kconfig and remove the unnecessary machine type dependency in Makefile. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sean Wang
David S. Miller
parent
da779b4011
commit
2ec50f574e
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@ -7,11 +7,11 @@ config NET_VENDOR_MEDIATEK
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if NET_VENDOR_MEDIATEK
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config NET_MEDIATEK_SOC
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tristate "MediaTek MT7623 Gigabit ethernet support"
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depends on NET_VENDOR_MEDIATEK && (MACH_MT7623 || MACH_MT2701)
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tristate "MediaTek SoC Gigabit Ethernet support"
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depends on NET_VENDOR_MEDIATEK
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select PHYLIB
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---help---
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This driver supports the gigabit ethernet MACs in the
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MediaTek MT2701/MT7623 chipset family.
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MediaTek SoC family.
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endif #NET_VENDOR_MEDIATEK
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@ -185,7 +185,8 @@ static void mtk_phy_link_adjust(struct net_device *dev)
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break;
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};
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if (mac->id == 0 && !mac->trgmii)
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if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) &&
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!mac->id && !mac->trgmii)
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mtk_gmac0_rgmii_adjust(mac->hw, dev->phydev->speed);
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if (dev->phydev->link)
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@ -1834,9 +1835,36 @@ static void ethsys_reset(struct mtk_eth *eth, u32 reset_bits)
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mdelay(10);
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}
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static void mtk_clk_disable(struct mtk_eth *eth)
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{
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int clk;
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for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--)
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clk_disable_unprepare(eth->clks[clk]);
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}
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static int mtk_clk_enable(struct mtk_eth *eth)
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{
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int clk, ret;
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for (clk = 0; clk < MTK_CLK_MAX ; clk++) {
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ret = clk_prepare_enable(eth->clks[clk]);
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if (ret)
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goto err_disable_clks;
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}
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return 0;
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err_disable_clks:
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while (--clk >= 0)
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clk_disable_unprepare(eth->clks[clk]);
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return ret;
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}
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static int mtk_hw_init(struct mtk_eth *eth)
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{
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int i, val;
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int i, val, ret;
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if (test_and_set_bit(MTK_HW_INIT, ð->state))
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return 0;
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@ -1844,10 +1872,10 @@ static int mtk_hw_init(struct mtk_eth *eth)
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pm_runtime_enable(eth->dev);
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pm_runtime_get_sync(eth->dev);
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clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]);
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clk_prepare_enable(eth->clks[MTK_CLK_ESW]);
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clk_prepare_enable(eth->clks[MTK_CLK_GP1]);
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clk_prepare_enable(eth->clks[MTK_CLK_GP2]);
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ret = mtk_clk_enable(eth);
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if (ret)
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goto err_disable_pm;
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ethsys_reset(eth, RSTCTRL_FE);
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ethsys_reset(eth, RSTCTRL_PPE);
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@ -1915,6 +1943,12 @@ static int mtk_hw_init(struct mtk_eth *eth)
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}
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return 0;
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err_disable_pm:
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pm_runtime_put_sync(eth->dev);
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pm_runtime_disable(eth->dev);
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return ret;
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}
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static int mtk_hw_deinit(struct mtk_eth *eth)
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@ -1922,10 +1956,7 @@ static int mtk_hw_deinit(struct mtk_eth *eth)
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if (!test_and_clear_bit(MTK_HW_INIT, ð->state))
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return 0;
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clk_disable_unprepare(eth->clks[MTK_CLK_GP2]);
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clk_disable_unprepare(eth->clks[MTK_CLK_GP1]);
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clk_disable_unprepare(eth->clks[MTK_CLK_ESW]);
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clk_disable_unprepare(eth->clks[MTK_CLK_ETHIF]);
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mtk_clk_disable(eth);
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pm_runtime_put_sync(eth->dev);
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pm_runtime_disable(eth->dev);
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@ -2403,6 +2434,7 @@ static int mtk_probe(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct device_node *mac_np;
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const struct of_device_id *match;
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struct mtk_eth *eth;
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int err;
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int i;
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@ -2411,6 +2443,9 @@ static int mtk_probe(struct platform_device *pdev)
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if (!eth)
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return -ENOMEM;
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match = of_match_device(of_mtk_match, &pdev->dev);
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eth->soc = (struct mtk_soc_data *)match->data;
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eth->dev = &pdev->dev;
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eth->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(eth->base))
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@ -2447,7 +2482,12 @@ static int mtk_probe(struct platform_device *pdev)
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if (IS_ERR(eth->clks[i])) {
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if (PTR_ERR(eth->clks[i]) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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return -ENODEV;
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if (eth->soc->required_clks & BIT(i)) {
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dev_err(&pdev->dev, "clock %s not found\n",
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mtk_clks_source_name[i]);
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return -EINVAL;
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}
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eth->clks[i] = NULL;
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}
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}
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@ -2550,8 +2590,19 @@ static int mtk_remove(struct platform_device *pdev)
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return 0;
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}
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static const struct mtk_soc_data mt2701_data = {
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.caps = MTK_GMAC1_TRGMII,
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.required_clks = MT7623_CLKS_BITMAP
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};
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static const struct mtk_soc_data mt7623_data = {
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.caps = MTK_GMAC1_TRGMII,
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.required_clks = MT7623_CLKS_BITMAP
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};
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const struct of_device_id of_mtk_match[] = {
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{ .compatible = "mediatek,mt2701-eth" },
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{ .compatible = "mediatek,mt2701-eth", .data = &mt2701_data},
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{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
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{},
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};
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MODULE_DEVICE_TABLE(of, of_mtk_match);
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@ -443,6 +443,9 @@ enum mtk_clks_map {
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MTK_CLK_MAX
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};
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#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \
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BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \
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BIT(MTK_CLK_TRGPLL))
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enum mtk_dev_state {
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MTK_HW_INIT,
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MTK_RESETTING
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@ -511,6 +514,21 @@ struct mtk_rx_ring {
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u32 crx_idx_reg;
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};
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#define MTK_TRGMII BIT(0)
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#define MTK_GMAC1_TRGMII (BIT(1) | MTK_TRGMII)
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#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
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/* struct mtk_soc_data - This is the structure holding all differences
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* among various plaforms
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* @caps Flags shown the extra capability for the SoC
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* @required_clks Flags shown the bitmap for required clocks on
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* the target SoC
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*/
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struct mtk_soc_data {
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u32 caps;
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u32 required_clks;
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};
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/* currently no SoC has more than 2 macs */
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#define MTK_MAX_DEVS 2
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@ -542,7 +560,8 @@ struct mtk_rx_ring {
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* @clks: clock array for all clocks required
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* @mii_bus: If there is a bus we need to create an instance for it
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* @pending_work: The workqueue used to reset the dma ring
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* @state Initialization and runtime state of the device.
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* @state Initialization and runtime state of the device
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* @soc: Holding specific data among vaious SoCs
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*/
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struct mtk_eth {
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@ -574,6 +593,8 @@ struct mtk_eth {
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struct mii_bus *mii_bus;
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struct work_struct pending_work;
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unsigned long state;
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const struct mtk_soc_data *soc;
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};
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/* struct mtk_mac - the structure that holds the info about the MACs of the
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