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arm64: atomics: Remove '&' from '+&' asm constraint in lse atomics 

The lse implementation of atomic64_dec_if_positive uses the '+&' constraint,
but the '&' is redundant and confusing in this case, since early clobber
on a read/write operand is a strange concept.

Replace the constraint with '+'.

Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Will Deacon 2017-07-07 17:01:50 +01:00
parent c396fe7f0c
commit 32fb5d73c9
1 changed files with 1 additions and 1 deletions
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arch/arm64/include/asm/atomic_lse.h
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@ -435,7 +435,7 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
" sub x30, x30, %[ret]\n" " sub x30, x30, %[ret]\n"
" cbnz x30, 1b\n" " cbnz x30, 1b\n"
"2:") "2:")
: [ret] "+&r" (x0), [v] "+Q" (v->counter) : [ret] "+r" (x0), [v] "+Q" (v->counter)
: :
: __LL_SC_CLOBBERS, "cc", "memory"); : __LL_SC_CLOBBERS, "cc", "memory");