drm fixes for 5.13-rc2 (part two)
msm - dsi regression fix - dma-buf pinning fix - displayport fixes - llc fix i915: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJgnuSsAAoJEAx081l5xIa+G6QQAI1RfmoxL2TrabYuVb0n1ek4 5FGv8niKdbPDzJEA7XyMWLRTC92Q9kITdvGweJODF0dvCGBusppa4Xv97jCDIOSS Mxu2DDdIejXGmQbzLCN50SIhE7sMm+R1vtmbYJdk209I6dZyWPAlIN5YgIfavDp1 aek7gUhcx6dp0uzOP/TeZqlDXGarDV8SzZHwUyUJkXno2FZRPoCa08ueo7beeyMY E6Sgjxl97mTBkFmfKxyiMTYNpJfENuM32HTDKGX9PD0XPpoNSgadrufk375h2xPr 2Hnp8ahePKCiNTgdC8ELkMJwAEIc1ZFi0pac8w6kUj9GdeSZP4oqWml2wKj1AzdA FTCgfUoBGV6ZrVwMiLegGhDaHUBw4owuVo1k7IZjDcohWL+OHdbZpiWyzBcqVWb5 vhp02/yso6XXok6suVjmAChie1bk5ipW3w1cqxtjDLkvY+4k8HX02l3BiGZD/BwW 3pIZCPda84+DzYRFrWFffm8H74K2Rcmq8ENDzlhbDtPSrGaf428KX443oMy9daaH yYYk3raqLC483p7m3w357zFVTzJA8K9bYI6xZYCm/lfXvuQNBc5/NrRYkQpxVMru 4o4/m6Hdr2YoWr3zJuHmDzN1M1mFvjJRzxXeu1ny6jtbKt4n9/0vV+ESa7geRLry E7pV9YJhxatjgPhyRF/E =LqER -----END PGP SIGNATURE----- Merge tag 'drm-fixes-2021-05-15' of git://anongit.freedesktop.org/drm/drm Pull more drm fixes from Dave Airlie: "Looks like I wasn't the only one not fully switched on this week. The msm pull has a missing tag so I missed it, and i915 team were a bit late. In my defence I did have a day with the roof of my home office removed, so was sitting at my kids desk. msm: - dsi regression fix - dma-buf pinning fix - displayport fixes - llc fix i915: - Fix active callback alignment annotations and subsequent crashes - Retract link training strategy to slow and wide, again - Avoid division by zero on gen2 - Use correct width reads for C0DRB3/C1DRB3 registers - Fix double free in pdp allocation failure path - Fix HDMI 2.1 PCON downstream caps check" * tag 'drm-fixes-2021-05-15' of git://anongit.freedesktop.org/drm/drm: drm/i915: Use correct downstream caps for check Src-Ctl mode for PCON drm/i915/overlay: Fix active retire callback alignment drm/i915: Fix crash in auto_retire drm/i915/gt: Fix a double free in gen8_preallocate_top_level_pdp drm/i915: Read C0DRB3/C1DRB3 as 16 bits again drm/i915: Avoid div-by-zero on gen2 drm/i915/dp: Use slow and wide link training for everything drm/msm/dp: initialize audio_comp when audio starts drm/msm/dp: check sink_count before update is_connected status drm/msm: fix minor version to indicate MSM_PARAM_SUSPENDS support drm/msm/dsi: fix msm_dsi_phy_get_clk_provider return code drm/msm/dsi: dsi_phy_28nm_8960: fix uninitialized variable access drm/msm: fix LLC not being enabled for mmu500 targets drm/msm: Do not unpin/evict exported dma-buf's
This commit is contained in:
Linus Torvalds
commit
33f85ca44e
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@ -1095,44 +1095,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
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return -EINVAL;
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}
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/* Optimize link config in order: max bpp, min lanes, min clock */
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static int
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intel_dp_compute_link_config_fast(struct intel_dp *intel_dp,
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struct intel_crtc_state *pipe_config,
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const struct link_config_limits *limits)
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{
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const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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int bpp, clock, lane_count;
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int mode_rate, link_clock, link_avail;
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for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
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int output_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp);
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mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
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output_bpp);
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for (lane_count = limits->min_lane_count;
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lane_count <= limits->max_lane_count;
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lane_count <<= 1) {
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for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
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link_clock = intel_dp->common_rates[clock];
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link_avail = intel_dp_max_data_rate(link_clock,
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lane_count);
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if (mode_rate <= link_avail) {
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pipe_config->lane_count = lane_count;
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pipe_config->pipe_bpp = bpp;
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pipe_config->port_clock = link_clock;
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return 0;
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}
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}
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}
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}
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return -EINVAL;
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}
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static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)
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{
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int i, num_bpc;
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@ -1382,22 +1344,11 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
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intel_dp_can_bigjoiner(intel_dp))
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pipe_config->bigjoiner = true;
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if (intel_dp_is_edp(intel_dp))
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/*
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* Optimize for fast and narrow. eDP 1.3 section 3.3 and eDP 1.4
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* section A.1: "It is recommended that the minimum number of
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* lanes be used, using the minimum link rate allowed for that
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* lane configuration."
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*
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* Note that we fall back to the max clock and lane count for eDP
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* panels that fail with the fast optimal settings (see
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* intel_dp->use_max_params), in which case the fast vs. wide
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* choice doesn't matter.
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*/
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ret = intel_dp_compute_link_config_fast(intel_dp, pipe_config, &limits);
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else
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/* Optimize for slow and wide. */
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ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
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/*
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* Optimize for slow and wide for everything, because there are some
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* eDP 1.3 and 1.4 panels don't work well with fast and narrow.
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*/
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ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);
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/* enable compression if the mode doesn't fit available BW */
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drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
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@ -2160,7 +2111,7 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
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* -PCON supports SRC_CTL_MODE (VESA DP2.0-HDMI2.1 PCON Spec Draft-1 Sec-7)
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* -sink is HDMI2.1
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*/
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if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) ||
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if (!(intel_dp->downstream_ports[2] & DP_PCON_SOURCE_CTL_MODE) ||
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!intel_dp_is_hdmi_2_1_sink(intel_dp) ||
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intel_dp->frl.is_trained)
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return;
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@ -383,7 +383,7 @@ static void intel_overlay_off_tail(struct intel_overlay *overlay)
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i830_overlay_clock_gating(dev_priv, true);
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}
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static void
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__i915_active_call static void
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intel_overlay_last_flip_retire(struct i915_active *active)
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{
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struct intel_overlay *overlay =
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@ -189,7 +189,7 @@ compute_partial_view(const struct drm_i915_gem_object *obj,
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struct i915_ggtt_view view;
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if (i915_gem_object_is_tiled(obj))
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chunk = roundup(chunk, tile_row_pages(obj));
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chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
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view.type = I915_GGTT_VIEW_PARTIAL;
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view.partial.offset = rounddown(page_offset, chunk);
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@ -641,7 +641,6 @@ static int gen8_preallocate_top_level_pdp(struct i915_ppgtt *ppgtt)
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err = pin_pt_dma(vm, pde->pt.base);
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if (err) {
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i915_gem_object_put(pde->pt.base);
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free_pd(vm, pde);
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return err;
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}
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@ -653,8 +653,8 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
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* banks of memory are paired and unswizzled on the
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* uneven portion, so leave that as unknown.
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*/
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if (intel_uncore_read(uncore, C0DRB3) ==
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intel_uncore_read(uncore, C1DRB3)) {
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if (intel_uncore_read16(uncore, C0DRB3) ==
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intel_uncore_read16(uncore, C1DRB3)) {
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swizzle_x = I915_BIT_6_SWIZZLE_9_10;
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swizzle_y = I915_BIT_6_SWIZZLE_9;
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}
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@ -1156,7 +1156,8 @@ static int auto_active(struct i915_active *ref)
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return 0;
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}
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static void auto_retire(struct i915_active *ref)
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__i915_active_call static void
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auto_retire(struct i915_active *ref)
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{
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i915_active_put(ref);
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}
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@ -1153,10 +1153,6 @@ static void a6xx_llc_slices_init(struct platform_device *pdev,
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{
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struct device_node *phandle;
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a6xx_gpu->llc_mmio = msm_ioremap(pdev, "cx_mem", "gpu_cx");
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if (IS_ERR(a6xx_gpu->llc_mmio))
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return;
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/*
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* There is a different programming path for targets with an mmu500
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* attached, so detect if that is the case
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@ -1166,6 +1162,11 @@ static void a6xx_llc_slices_init(struct platform_device *pdev,
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of_device_is_compatible(phandle, "arm,mmu-500"));
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of_node_put(phandle);
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if (a6xx_gpu->have_mmu500)
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a6xx_gpu->llc_mmio = NULL;
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else
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a6xx_gpu->llc_mmio = msm_ioremap(pdev, "cx_mem", "gpu_cx");
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a6xx_gpu->llc_slice = llcc_slice_getd(LLCC_GPU);
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a6xx_gpu->htw_llc_slice = llcc_slice_getd(LLCC_GPUHTW);
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@ -527,6 +527,7 @@ int dp_audio_hw_params(struct device *dev,
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dp_audio_setup_acr(audio);
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dp_audio_safe_to_exit_level(audio);
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dp_audio_enable(audio, true);
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dp_display_signal_audio_start(dp_display);
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dp_display->audio_enabled = true;
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end:
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@ -178,6 +178,15 @@ static int dp_del_event(struct dp_display_private *dp_priv, u32 event)
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return 0;
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}
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void dp_display_signal_audio_start(struct msm_dp *dp_display)
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{
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struct dp_display_private *dp;
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dp = container_of(dp_display, struct dp_display_private, dp_display);
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reinit_completion(&dp->audio_comp);
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}
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void dp_display_signal_audio_complete(struct msm_dp *dp_display)
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{
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struct dp_display_private *dp;
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@ -586,10 +595,8 @@ static int dp_connect_pending_timeout(struct dp_display_private *dp, u32 data)
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mutex_lock(&dp->event_mutex);
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state = dp->hpd_state;
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if (state == ST_CONNECT_PENDING) {
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dp_display_enable(dp, 0);
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if (state == ST_CONNECT_PENDING)
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dp->hpd_state = ST_CONNECTED;
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}
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mutex_unlock(&dp->event_mutex);
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@ -651,7 +658,6 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data)
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dp_add_event(dp, EV_DISCONNECT_PENDING_TIMEOUT, 0, DP_TIMEOUT_5_SECOND);
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/* signal the disconnect event early to ensure proper teardown */
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reinit_completion(&dp->audio_comp);
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dp_display_handle_plugged_change(g_dp_display, false);
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dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK |
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@ -669,10 +675,8 @@ static int dp_disconnect_pending_timeout(struct dp_display_private *dp, u32 data
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mutex_lock(&dp->event_mutex);
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state = dp->hpd_state;
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if (state == ST_DISCONNECT_PENDING) {
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dp_display_disable(dp, 0);
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if (state == ST_DISCONNECT_PENDING)
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dp->hpd_state = ST_DISCONNECTED;
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}
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mutex_unlock(&dp->event_mutex);
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@ -898,7 +902,6 @@ static int dp_display_disable(struct dp_display_private *dp, u32 data)
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/* wait only if audio was enabled */
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if (dp_display->audio_enabled) {
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/* signal the disconnect event */
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reinit_completion(&dp->audio_comp);
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dp_display_handle_plugged_change(dp_display, false);
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if (!wait_for_completion_timeout(&dp->audio_comp,
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HZ * 5))
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@ -1272,7 +1275,12 @@ static int dp_pm_resume(struct device *dev)
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status = dp_catalog_link_is_connected(dp->catalog);
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if (status)
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/*
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* can not declared display is connected unless
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* HDMI cable is plugged in and sink_count of
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* dongle become 1
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*/
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if (status && dp->link->sink_count)
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dp->dp_display.is_connected = true;
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else
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dp->dp_display.is_connected = false;
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@ -34,6 +34,7 @@ int dp_display_get_modes(struct msm_dp *dp_display,
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int dp_display_request_irq(struct msm_dp *dp_display);
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bool dp_display_check_video_test(struct msm_dp *dp_display);
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int dp_display_get_test_bpp(struct msm_dp *dp_display);
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void dp_display_signal_audio_start(struct msm_dp *dp_display);
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void dp_display_signal_audio_complete(struct msm_dp *dp_display);
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#endif /* _DP_DISPLAY_H_ */
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@ -843,7 +843,7 @@ int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
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if (pixel_clk_provider)
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*pixel_clk_provider = phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
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return -EINVAL;
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return 0;
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}
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void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
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@ -405,6 +405,10 @@ static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm, struct clk_hw **prov
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if (!vco_name)
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return -ENOMEM;
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parent_name = devm_kzalloc(dev, 32, GFP_KERNEL);
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if (!parent_name)
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return -ENOMEM;
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clk_name = devm_kzalloc(dev, 32, GFP_KERNEL);
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if (!clk_name)
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return -ENOMEM;
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@ -42,7 +42,7 @@
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* - 1.7.0 - Add MSM_PARAM_SUSPENDS to access suspend count
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*/
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#define MSM_VERSION_MAJOR 1
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#define MSM_VERSION_MINOR 6
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#define MSM_VERSION_MINOR 7
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#define MSM_VERSION_PATCHLEVEL 0
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static const struct drm_mode_config_funcs mode_config_funcs = {
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|
|
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@ -190,13 +190,25 @@ struct page **msm_gem_get_pages(struct drm_gem_object *obj)
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}
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p = get_pages(obj);
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if (!IS_ERR(p)) {
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msm_obj->pin_count++;
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update_inactive(msm_obj);
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}
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msm_gem_unlock(obj);
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return p;
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}
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void msm_gem_put_pages(struct drm_gem_object *obj)
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{
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/* when we start tracking the pin count, then do something here */
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struct msm_gem_object *msm_obj = to_msm_bo(obj);
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msm_gem_lock(obj);
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msm_obj->pin_count--;
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GEM_WARN_ON(msm_obj->pin_count < 0);
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update_inactive(msm_obj);
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msm_gem_unlock(obj);
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}
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int msm_gem_mmap_obj(struct drm_gem_object *obj,
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|
@ -646,6 +658,8 @@ static void *get_vaddr(struct drm_gem_object *obj, unsigned madv)
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|||
ret = -ENOMEM;
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||||
goto fail;
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||||
}
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update_inactive(msm_obj);
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}
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return msm_obj->vaddr;
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|
|
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|||
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|
@ -221,7 +221,7 @@ static inline bool is_active(struct msm_gem_object *msm_obj)
|
|||
/* imported/exported objects are not purgeable: */
|
||||
static inline bool is_unpurgeable(struct msm_gem_object *msm_obj)
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||||
{
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||||
return msm_obj->base.dma_buf && msm_obj->base.import_attach;
|
||||
return msm_obj->base.import_attach || msm_obj->pin_count;
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||||
}
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||||
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||||
static inline bool is_purgeable(struct msm_gem_object *msm_obj)
|
||||
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|
@ -271,7 +271,7 @@ static inline void mark_unpurgeable(struct msm_gem_object *msm_obj)
|
|||
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||||
static inline bool is_unevictable(struct msm_gem_object *msm_obj)
|
||||
{
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||||
return is_unpurgeable(msm_obj) || msm_obj->pin_count || msm_obj->vaddr;
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||||
return is_unpurgeable(msm_obj) || msm_obj->vaddr;
|
||||
}
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||||
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||||
static inline void mark_evictable(struct msm_gem_object *msm_obj)
|
||||
|
|
|
|||
Loading…
Reference in New Issue