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usb: orion-ehci: Add support for the Armada 3700 

- Add a new compatible string for the Armada 3700 SoCs

- add sbuscfg support for orion usb controller driver. For the SoCs
  without hlock, need to program BAWR/BARD/AHBBRST fields in the sbuscfg
  register to guarantee the AHB master's burst would not overrun or
  underrun the FIFO.

- the sbuscfg register has to be set after the usb controller reset,
  otherwise the value would be overridden to 0. In order to do this, the
  reset callback is registered.

[gregory.clement@free-electrons.com: - reword commit and comments
				     - fix error path in ehci_orion_drv_reset()
				     - fix checkpatch warning]
Signed-off-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Hua Jing 2017-03-09 18:52:56 +01:00 committed by Greg Kroah-Hartman
parent 8d66db50b2
commit 356c50079b
2 changed files with 39 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/devicetree/bindings/usb/ehci-orion.txt
View File

@ -1,7 +1,9 @@
* EHCI controller, Orion Marvell variants
Required properties:
- compatible: must be "marvell,orion-ehci"
- compatible: must be one of the following
"marvell,orion-ehci"
"marvell,armada-3700-ehci"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: The EHCI interrupt

36
drivers/usb/host/ehci-orion.c
View File

@ -47,6 +47,18 @@
#define USB_PHY_IVREF_CTRL 0x440
#define USB_PHY_TST_GRP_CTRL 0x450
#define USB_SBUSCFG 0x90
/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
#define USB_SBUSCFG_BAWR_ALIGN_128B (0x3 << 6)
#define USB_SBUSCFG_BARD_ALIGN_128B (0x3 << 3)
/* AHBBRST = 3 : Align AHB Burst to INCR16 (64 bytes) */
#define USB_SBUSCFG_AHBBRST_INCR16 (0x3 << 0)
#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B \
| USB_SBUSCFG_BARD_ALIGN_128B \
| USB_SBUSCFG_AHBBRST_INCR16)
#define DRIVER_DESC "EHCI orion driver"
#define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
@ -151,8 +163,31 @@ ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
}
}
static int ehci_orion_drv_reset(struct usb_hcd *hcd)
{
struct device *dev = hcd->self.controller;
int ret;
ret = ehci_setup(hcd);
if (ret)
return ret;
/*
* For SoC without hlock, need to program sbuscfg value to guarantee
* AHB master's burst would not overrun or underrun FIFO.
*
* sbuscfg reg has to be set after usb controller reset, otherwise
* the value would be override to 0.
*/
if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
return ret;
}
static const struct ehci_driver_overrides orion_overrides __initconst = {
.extra_priv_size = sizeof(struct orion_ehci_hcd),
.reset = ehci_orion_drv_reset,
};
static int ehci_orion_drv_probe(struct platform_device *pdev)
@ -310,6 +345,7 @@ static int ehci_orion_drv_remove(struct platform_device *pdev)
static const struct of_device_id ehci_orion_dt_ids[] = {
{ .compatible = "marvell,orion-ehci", },
{ .compatible = "marvell,armada-3700-ehci", },
{},
};
MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);