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arm64: dts: Add display subsystem DT nodes for hi6220-hikey 

Add ade and dsi DT nodes for hikey board.

Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Xinliang Liu 2016-08-22 15:48:02 -07:00 committed by Wei Xu
parent 1b9c7b2d63
commit 3814b61bd7
2 changed files with 63 additions and 0 deletions
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8
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
View File

@ -374,3 +374,11 @@ &uart2 {
&uart3 {
label = "LS-UART1";
};
&ade {
status = "ok";
};
&dsi {
status = "ok";
};

55
arch/arm64/boot/dts/hisilicon/hi6220.dtsi
View File

@ -262,6 +262,11 @@ pm_ctrl: pm_ctrl@f7032000 {
#clock-cells = <1>;
};
medianoc_ade: medianoc_ade@f4520000 {
compatible = "syscon";
reg = <0x0 0xf4520000 0x0 0x4000>;
};
stub_clock: stub_clock {
compatible = "hisilicon,hi6220-stub-clk";
hisilicon,hi6220-clk-sram = <&sram>;
@ -850,5 +855,55 @@ map0 {
};
};
};
ade: ade@f4100000 {
compatible = "hisilicon,hi6220-ade";
reg = <0x0 0xf4100000 0x0 0x7800>;
reg-names = "ade_base";
hisilicon,noc-syscon = <&medianoc_ade>;
resets = <&media_ctrl MEDIA_ADE>;
interrupts = <0 115 4>; /* ldi interrupt */
clocks = <&media_ctrl HI6220_ADE_CORE>,
<&media_ctrl HI6220_CODEC_JPEG>,
<&media_ctrl HI6220_ADE_PIX_SRC>;
/*clock name*/
clock-names = "clk_ade_core",
"clk_codec_jpeg",
"clk_ade_pix";
assigned-clocks = <&media_ctrl HI6220_ADE_CORE>,
<&media_ctrl HI6220_CODEC_JPEG>;
assigned-clock-rates = <360000000>, <288000000>;
dma-coherent;
status = "disabled";
port {
ade_out: endpoint {
remote-endpoint = <&dsi_in>;
};
};
};
dsi: dsi@f4107800 {
compatible = "hisilicon,hi6220-dsi";
reg = <0x0 0xf4107800 0x0 0x100>;
clocks = <&media_ctrl HI6220_DSI_PCLK>;
clock-names = "pclk";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* 0 for input port */
port@0 {
reg = <0>;
dsi_in: endpoint {
remote-endpoint = <&ade_out>;
};
};
};
};
};
};