drm/i915: Move updating color management to before vblank evasion
This cannot be done reliably during vblank evasasion since the color management registers are not double buffered. The original commit that moved it always during vblank evasion was wrong, so revert it to before vblank evasion again. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Fixes:20a34e78f0
("drm/i915: Update color management during vblank evasion.") Cc: stable@vger.kernel.org # v4.7+ Link: http://patchwork.freedesktop.org/patch/msgid/1488292128-14540-1-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (cherry picked from commit567f0792a6
) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -14946,17 +14946,19 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
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to_intel_atomic_state(old_crtc_state->state);
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bool modeset = needs_modeset(crtc->state);
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if (!modeset &&
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(intel_cstate->base.color_mgmt_changed ||
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intel_cstate->update_pipe)) {
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intel_color_set_csc(crtc->state);
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intel_color_load_luts(crtc->state);
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}
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/* Perform vblank evasion around commit operation */
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intel_pipe_update_start(intel_crtc);
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if (modeset)
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goto out;
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if (crtc->state->color_mgmt_changed || to_intel_crtc_state(crtc->state)->update_pipe) {
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intel_color_set_csc(crtc->state);
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intel_color_load_luts(crtc->state);
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}
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if (intel_cstate->update_pipe)
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intel_update_pipe_config(intel_crtc, old_intel_cstate);
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else if (INTEL_GEN(dev_priv) >= 9)
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