ARM: dts: r8a7790: Add SCIF2 clock
Based on Rev. 2.00 of the R-Car Gen2 datasheet. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -1302,19 +1302,19 @@ R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
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mstp3_clks: mstp3_clks@e615013c {
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
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clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
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clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
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<&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
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<&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
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<&hp_clk>, <&hp_clk>;
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#clock-cells = <1>;
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clock-indices = <
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R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
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R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
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R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
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R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
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R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
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>;
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clock-output-names =
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"iic2", "tpu0", "mmcif1", "sdhi3",
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"iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
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"sdhi2", "sdhi1", "sdhi0", "mmcif0",
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"iic0", "pciec", "iic1", "ssusb", "cmt1",
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"usbdmac0", "usbdmac1";
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@ -66,6 +66,7 @@
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#define R8A7790_CLK_IIC2 0
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#define R8A7790_CLK_TPU0 4
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#define R8A7790_CLK_MMCIF1 5
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#define R8A7790_CLK_SCIF2 10
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#define R8A7790_CLK_SDHI3 11
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#define R8A7790_CLK_SDHI2 12
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#define R8A7790_CLK_SDHI1 13
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