diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 584e119fa8b0..ec8a228df2f6 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -51,6 +51,7 @@ _GLOBAL(__setup_cpu_power8) mflr r11 bl __init_FSCR bl __init_PMU + bl __init_PMU_ISA207 bl __init_hvmode_206 mtlr r11 beqlr @@ -62,10 +63,50 @@ _GLOBAL(__setup_cpu_power8) bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV + bl __init_PMU_HV_ISA207 mtlr r11 blr _GLOBAL(__restore_cpu_power8) + mflr r11 + bl __init_FSCR + bl __init_PMU + bl __init_PMU_ISA207 + mfmsr r3 + rldicl. r0,r3,4,63 + mtlr r11 + beqlr + li r0,0 + mtspr SPRN_LPID,r0 + mfspr r3,SPRN_LPCR + ori r3, r3, LPCR_PECEDH + bl __init_LPCR + bl __init_HFSCR + bl __init_tlb_power8 + bl __init_PMU_HV + bl __init_PMU_HV_ISA207 + mtlr r11 + blr + +_GLOBAL(__setup_cpu_power9) + mflr r11 + bl __init_FSCR + bl __init_PMU + bl __init_hvmode_206 + mtlr r11 + beqlr + li r0,0 + mtspr SPRN_LPID,r0 + mfspr r3,SPRN_LPCR + ori r3, r3, LPCR_PECEDH + bl __init_LPCR + bl __init_HFSCR + bl __init_tlb_power9 + bl __init_PMU_HV + mtlr r11 + blr + +_GLOBAL(__restore_cpu_power9) mflr r11 bl __init_FSCR bl __init_PMU @@ -79,44 +120,11 @@ _GLOBAL(__restore_cpu_power8) ori r3, r3, LPCR_PECEDH bl __init_LPCR bl __init_HFSCR - bl __init_tlb_power8 + bl __init_tlb_power9 bl __init_PMU_HV mtlr r11 blr -_GLOBAL(__setup_cpu_power9) - mflr r11 - bl __init_FSCR - bl __init_hvmode_206 - mtlr r11 - beqlr - li r0,0 - mtspr SPRN_LPID,r0 - mfspr r3,SPRN_LPCR - ori r3, r3, LPCR_PECEDH - bl __init_LPCR - bl __init_HFSCR - bl __init_tlb_power9 - mtlr r11 - blr - -_GLOBAL(__restore_cpu_power9) - mflr r11 - bl __init_FSCR - mfmsr r3 - rldicl. r0,r3,4,63 - mtlr r11 - beqlr - li r0,0 - mtspr SPRN_LPID,r0 - mfspr r3,SPRN_LPCR - ori r3, r3, LPCR_PECEDH - bl __init_LPCR - bl __init_HFSCR - bl __init_tlb_power9 - mtlr r11 - blr - __init_hvmode_206: /* Disable CPU_FTR_HVMODE and exit if MSR:HV is not set */ mfmsr r3 @@ -208,14 +216,22 @@ __init_tlb_power9: __init_PMU_HV: li r5,0 mtspr SPRN_MMCRC,r5 + blr + +__init_PMU_HV_ISA207: + li r5,0 mtspr SPRN_MMCRH,r5 blr __init_PMU: li r5,0 - mtspr SPRN_MMCRS,r5 mtspr SPRN_MMCRA,r5 mtspr SPRN_MMCR0,r5 mtspr SPRN_MMCR1,r5 mtspr SPRN_MMCR2,r5 blr + +__init_PMU_ISA207: + li r5,0 + mtspr SPRN_MMCRS,r5 + blr