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Merge branch 'omap-for-v3.17/mailbox' into omap-for-v3.17/soc

This commit is contained in:
Tony Lindgren 2014-07-23 01:26:02 -07:00
parent ecf4c7938f cbf14f3ab9
commit 3965f5ba04
16 changed files with 449 additions and 61 deletions
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9
arch/arm/boot/dts/am33xx.dtsi
View File

@ -347,6 +347,15 @@ dcan1: d_can@481d0000 {
status = "disabled";
};
mailbox: mailbox@480C8000 {
compatible = "ti,omap4-mailbox";
reg = <0x480C8000 0x200>;
interrupts = <77>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
};
timer1: timer@44e31000 {
compatible = "ti,am335x-timer-1ms";
reg = <0x44e31000 0x400>;

3
arch/arm/boot/dts/am4372.dtsi
View File

@ -168,9 +168,6 @@ mailbox: mailbox@480C8000 {
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <8>;
ti,mbox-names = "wkup_m3";
ti,mbox-data = <0 0 0 0>;
status = "disabled";
};
timer1: timer@44e31000 {

117
arch/arm/boot/dts/dra7.dtsi
View File

@ -338,6 +338,123 @@ uart10: serial@4ae2b000 {
status = "disabled";
};
mailbox1: mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
ti,hwmods = "mailbox1";
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
status = "disabled";
};
mailbox2: mailbox@4883a000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883a000 0x200>;
ti,hwmods = "mailbox2";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox3: mailbox@4883c000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883c000 0x200>;
ti,hwmods = "mailbox3";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox4: mailbox@4883e000 {
compatible = "ti,omap4-mailbox";
reg = <0x4883e000 0x200>;
ti,hwmods = "mailbox4";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox5: mailbox@48840000 {
compatible = "ti,omap4-mailbox";
reg = <0x48840000 0x200>;
ti,hwmods = "mailbox5";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox6: mailbox@48842000 {
compatible = "ti,omap4-mailbox";
reg = <0x48842000 0x200>;
ti,hwmods = "mailbox6";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox7: mailbox@48844000 {
compatible = "ti,omap4-mailbox";
reg = <0x48844000 0x200>;
ti,hwmods = "mailbox7";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox8: mailbox@48846000 {
compatible = "ti,omap4-mailbox";
reg = <0x48846000 0x200>;
ti,hwmods = "mailbox8";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox9: mailbox@4885e000 {
compatible = "ti,omap4-mailbox";
reg = <0x4885e000 0x200>;
ti,hwmods = "mailbox9";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox10: mailbox@48860000 {
compatible = "ti,omap4-mailbox";
reg = <0x48860000 0x200>;
ti,hwmods = "mailbox10";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox11: mailbox@48862000 {
compatible = "ti,omap4-mailbox";
reg = <0x48862000 0x200>;
ti,hwmods = "mailbox11";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox12: mailbox@48864000 {
compatible = "ti,omap4-mailbox";
reg = <0x48864000 0x200>;
ti,hwmods = "mailbox12";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
mailbox13: mailbox@48802000 {
compatible = "ti,omap4-mailbox";
reg = <0x48802000 0x200>;
ti,hwmods = "mailbox13";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>;
status = "disabled";
};
timer1: timer@4ae18000 {
compatible = "ti,omap5430-timer";
reg = <0x4ae18000 0x80>;

2
arch/arm/boot/dts/omap2420.dtsi
View File

@ -157,6 +157,8 @@ mailbox: mailbox@48094000 {
interrupts = <26>, <34>;
interrupt-names = "dsp", "iva";
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <6>;
};
timer1: timer@48028000 {

2
arch/arm/boot/dts/omap2430.dtsi
View File

@ -247,6 +247,8 @@ mailbox: mailbox@48094000 {
reg = <0x48094000 0x200>;
interrupts = <26>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <6>;
};
timer1: timer@49018000 {

2
arch/arm/boot/dts/omap3.dtsi
View File

@ -332,6 +332,8 @@ mailbox: mailbox@48094000 {
ti,hwmods = "mailbox";
reg = <0x48094000 0x200>;
interrupts = <26>;
ti,mbox-num-users = <2>;
ti,mbox-num-fifos = <2>;
};
mcspi1: spi@48098000 {

9
arch/arm/boot/dts/omap4.dtsi
View File

@ -649,6 +649,15 @@ usb2_phy: usb2phy@4a0ad080 {
};
};
mailbox: mailbox@4a0f4000 {
compatible = "ti,omap4-mailbox";
reg = <0x4a0f4000 0x200>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
};
timer1: timer@4a318000 {
compatible = "ti,omap3430-timer";
reg = <0x4a318000 0x80>;

2
arch/arm/boot/dts/omap5.dtsi
View File

@ -640,6 +640,8 @@ mailbox: mailbox@4a0f4000 {
reg = <0x4a0f4000 0x200>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mailbox";
ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>;
};
timer1: timer@4ae18000 {

2
arch/arm/mach-omap2/devices.c
View File

@ -460,9 +460,9 @@ static int __init omap2_init_devices(void)
omap_init_audio();
omap_init_camera();
omap_init_hdmi_audio();
omap_init_mbox();
/* If dtb is there, the devices will be created dynamically */
if (!of_have_populated_dt()) {
omap_init_mbox();
omap_init_mcspi();
omap_init_sham();
omap_init_aes();

14
arch/arm/mach-omap2/omap_hwmod_2420_data.c
View File

@ -16,7 +16,6 @@
#include <linux/i2c-omap.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/mailbox-omap.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
@ -163,18 +162,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
};
/* mailbox */
static struct omap_mbox_dev_info omap2420_mailbox_info[] = {
{ .name = "dsp", .tx_id = 0, .rx_id = 1, .irq_id = 0, .usr_id = 0 },
{ .name = "iva", .tx_id = 2, .rx_id = 3, .irq_id = 1, .usr_id = 3 },
};
static struct omap_mbox_pdata omap2420_mailbox_attrs = {
.num_users = 4,
.num_fifos = 6,
.info_cnt = ARRAY_SIZE(omap2420_mailbox_info),
.info = omap2420_mailbox_info,
};
static struct omap_hwmod omap2420_mailbox_hwmod = {
.name = "mailbox",
.class = &omap2xxx_mailbox_hwmod_class,
@ -188,7 +175,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
},
},
.dev_attr = &omap2420_mailbox_attrs,
};
/*

13
arch/arm/mach-omap2/omap_hwmod_2430_data.c
View File

@ -17,7 +17,6 @@
#include <linux/platform_data/asoc-ti-mcbsp.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/omap-dma.h>
#include <linux/platform_data/mailbox-omap.h>
#include <plat/dmtimer.h>
#include "omap_hwmod.h"
@ -161,17 +160,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
};
/* mailbox */
static struct omap_mbox_dev_info omap2430_mailbox_info[] = {
{ .name = "dsp", .tx_id = 0, .rx_id = 1 },
};
static struct omap_mbox_pdata omap2430_mailbox_attrs = {
.num_users = 4,
.num_fifos = 6,
.info_cnt = ARRAY_SIZE(omap2430_mailbox_info),
.info = omap2430_mailbox_info,
};
static struct omap_hwmod omap2430_mailbox_hwmod = {
.name = "mailbox",
.class = &omap2xxx_mailbox_hwmod_class,
@ -185,7 +173,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
},
},
.dev_attr = &omap2430_mailbox_attrs,
};
/* mcspi3 */

9
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
View File

@ -152,15 +152,6 @@ struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
{ }
};
struct omap_hwmod_addr_space omap2_mailbox_addrs[] = {
{
.pa_start = 0x48094000,
.pa_end = 0x48094000 + SZ_512 - 1,
.flags = ADDR_TYPE_RT,
},
{ }
};
struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
{
.name = "mpu",

10
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
View File

@ -317,21 +317,11 @@ struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_addr_space am33xx_mailbox_addrs[] = {
{
.pa_start = 0x480C8000,
.pa_end = 0x480C8000 + (SZ_4K - 1),
.flags = ADDR_TYPE_RT
},
{ }
};
/* l4 ls -> mailbox */
struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_mailbox_hwmod,
.clk = "l4ls_gclk",
.addr = am33xx_mailbox_addrs,
.user = OCP_USER_MPU,
};

10
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
View File

@ -4142,21 +4142,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
{
.pa_start = 0x4a0f4000,
.pa_end = 0x4a0f41ff,
.flags = ADDR_TYPE_RT
},
{ }
};
/* l4_cfg -> mailbox */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_mailbox_hwmod,
.clk = "l4_div_ck",
.addr = omap44xx_mailbox_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

305
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
View File

@ -979,6 +979,194 @@ static struct omap_hwmod dra7xx_i2c5_hwmod = {
.dev_attr = &i2c_dev_attr,
};
/*
* 'mailbox' class
*
*/
static struct omap_hwmod_class_sysconfig dra7xx_mailbox_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
SYSC_HAS_SOFTRESET),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type2,
};
static struct omap_hwmod_class dra7xx_mailbox_hwmod_class = {
.name = "mailbox",
.sysc = &dra7xx_mailbox_sysc,
};
/* mailbox1 */
static struct omap_hwmod dra7xx_mailbox1_hwmod = {
.name = "mailbox1",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX1_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX1_CONTEXT_OFFSET,
},
},
};
/* mailbox2 */
static struct omap_hwmod dra7xx_mailbox2_hwmod = {
.name = "mailbox2",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX2_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX2_CONTEXT_OFFSET,
},
},
};
/* mailbox3 */
static struct omap_hwmod dra7xx_mailbox3_hwmod = {
.name = "mailbox3",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX3_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX3_CONTEXT_OFFSET,
},
},
};
/* mailbox4 */
static struct omap_hwmod dra7xx_mailbox4_hwmod = {
.name = "mailbox4",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX4_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX4_CONTEXT_OFFSET,
},
},
};
/* mailbox5 */
static struct omap_hwmod dra7xx_mailbox5_hwmod = {
.name = "mailbox5",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX5_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX5_CONTEXT_OFFSET,
},
},
};
/* mailbox6 */
static struct omap_hwmod dra7xx_mailbox6_hwmod = {
.name = "mailbox6",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX6_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX6_CONTEXT_OFFSET,
},
},
};
/* mailbox7 */
static struct omap_hwmod dra7xx_mailbox7_hwmod = {
.name = "mailbox7",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX7_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX7_CONTEXT_OFFSET,
},
},
};
/* mailbox8 */
static struct omap_hwmod dra7xx_mailbox8_hwmod = {
.name = "mailbox8",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX8_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX8_CONTEXT_OFFSET,
},
},
};
/* mailbox9 */
static struct omap_hwmod dra7xx_mailbox9_hwmod = {
.name = "mailbox9",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX9_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX9_CONTEXT_OFFSET,
},
},
};
/* mailbox10 */
static struct omap_hwmod dra7xx_mailbox10_hwmod = {
.name = "mailbox10",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX10_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX10_CONTEXT_OFFSET,
},
},
};
/* mailbox11 */
static struct omap_hwmod dra7xx_mailbox11_hwmod = {
.name = "mailbox11",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX11_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX11_CONTEXT_OFFSET,
},
},
};
/* mailbox12 */
static struct omap_hwmod dra7xx_mailbox12_hwmod = {
.name = "mailbox12",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX12_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX12_CONTEXT_OFFSET,
},
},
};
/* mailbox13 */
static struct omap_hwmod dra7xx_mailbox13_hwmod = {
.name = "mailbox13",
.class = &dra7xx_mailbox_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX13_CLKCTRL_OFFSET,
.context_offs = DRA7XX_RM_L4CFG_MAILBOX13_CONTEXT_OFFSET,
},
},
};
/*
* 'mcspi' class
*
@ -2423,6 +2611,110 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__i2c5 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_cfg -> mailbox1 */
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mailbox1 = {
.master = &dra7xx_l4_cfg_hwmod,
.slave = &dra7xx_mailbox1_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox2 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox2 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox2_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox3 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox3 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox4 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox4 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox4_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox5 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox5 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox5_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox6 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox6 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox6_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox7 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox7 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox7_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox8 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox8 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox8_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox9 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox9 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox9_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox10 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox10 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox10_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox11 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox11 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox11_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox12 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox12 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox12_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per3 -> mailbox13 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox13 = {
.master = &dra7xx_l4_per3_hwmod,
.slave = &dra7xx_mailbox13_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_per1 -> mcspi1 */
static struct omap_hwmod_ocp_if dra7xx_l4_per1__mcspi1 = {
.master = &dra7xx_l4_per1_hwmod,
@ -2905,6 +3197,19 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per1__i2c3,
&dra7xx_l4_per1__i2c4,
&dra7xx_l4_per1__i2c5,
&dra7xx_l4_cfg__mailbox1,
&dra7xx_l4_per3__mailbox2,
&dra7xx_l4_per3__mailbox3,
&dra7xx_l4_per3__mailbox4,
&dra7xx_l4_per3__mailbox5,
&dra7xx_l4_per3__mailbox6,
&dra7xx_l4_per3__mailbox7,
&dra7xx_l4_per3__mailbox8,
&dra7xx_l4_per3__mailbox9,
&dra7xx_l4_per3__mailbox10,
&dra7xx_l4_per3__mailbox11,
&dra7xx_l4_per3__mailbox12,
&dra7xx_l4_per3__mailbox13,
&dra7xx_l4_per1__mcspi1,
&dra7xx_l4_per1__mcspi2,
&dra7xx_l4_per1__mcspi3,

1
arch/arm/mach-omap2/omap_hwmod_common_data.h
View File

@ -33,7 +33,6 @@ extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[];
extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[];
extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[];
extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
extern struct omap_hwmod_addr_space omap2_mailbox_addrs[];
extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[];
extern struct omap_hwmod_addr_space omap2_hdq1w_addr_space[];