dmaengine: pl330: fix issues with big-endian armv7
When running Xilinx Zynq in big-endian mode the pl330 driver fails to pass the dmatest suite. To fix this, ensure all non byte values are written in little endian. As a note, the documentation does not mention if it will do big-endian descriptor fetches, only that it will swap the data in flight. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> -- Vinod Koul <vinod.koul@intel.com> Dan Williams <dan.j.williams@intel.com> DMA List <dmaengine@vger.kernel.org> Maxime Ripard <maxime.ripard@free-electrons.com> Jassi Brar <jassisinghbrar@gmail.com> Liviu Dudau <Liviu.Dudau@arm.com> Linux ARM Kernel <linux-arm-kernel@lists.infradead.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -556,7 +556,7 @@ static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
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buf[0] = CMD_DMAADDH;
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buf[0] |= (da << 1);
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*((u16 *)&buf[1]) = val;
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*((__le16 *)&buf[1]) = cpu_to_le16(val);
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PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
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da == 1 ? "DA" : "SA", val);
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@ -710,7 +710,7 @@ static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
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buf[0] = CMD_DMAMOV;
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buf[1] = dst;
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*((u32 *)&buf[2]) = val;
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*((__le32 *)&buf[2]) = cpu_to_le32(val);
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PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n",
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dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val);
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@ -888,7 +888,7 @@ static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
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buf[1] = chan & 0x7;
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*((u32 *)&buf[2]) = addr;
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*((__le32 *)&buf[2]) = cpu_to_le32(addr);
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return SZ_DMAGO;
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}
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@ -928,7 +928,7 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
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}
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writel(val, regs + DBGINST0);
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val = *((u32 *)&insn[2]);
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val = le32_to_cpu(*((__le32 *)&insn[2]));
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writel(val, regs + DBGINST1);
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/* If timed out due to halted state-machine */
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