arm: KVM: Use common AArch32 conditional execution code
Add the bit of glue and const-ification that is required to use the code inherited from the arm64 port, and move over to it. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This commit is contained in:
Marc Zyngier
Christoffer Dall
parent
427d7cacf9
commit
3aedd5c49e
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@ -40,18 +40,28 @@ static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
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*vcpu_reg(vcpu, reg_num) = val;
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}
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bool kvm_condition_valid(struct kvm_vcpu *vcpu);
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void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr);
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bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
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void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
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void kvm_inject_undefined(struct kvm_vcpu *vcpu);
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void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
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void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
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static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
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{
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return kvm_condition_valid32(vcpu);
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}
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static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
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{
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kvm_skip_instr32(vcpu, is_wide_instr);
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}
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static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr = HCR_GUEST_MASK;
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}
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static inline unsigned long vcpu_get_hcr(struct kvm_vcpu *vcpu)
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static inline unsigned long vcpu_get_hcr(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hcr;
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}
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@ -61,7 +71,7 @@ static inline void vcpu_set_hcr(struct kvm_vcpu *vcpu, unsigned long hcr)
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vcpu->arch.hcr = hcr;
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}
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static inline bool vcpu_mode_is_32bit(struct kvm_vcpu *vcpu)
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static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
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{
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return 1;
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}
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@ -71,9 +81,9 @@ static inline unsigned long *vcpu_pc(struct kvm_vcpu *vcpu)
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return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_pc;
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}
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static inline unsigned long *vcpu_cpsr(struct kvm_vcpu *vcpu)
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static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
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{
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return &vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr;
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return (unsigned long *)&vcpu->arch.ctxt.gp_regs.usr_regs.ARM_cpsr;
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}
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static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
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@ -93,11 +103,21 @@ static inline bool vcpu_mode_priv(struct kvm_vcpu *vcpu)
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return cpsr_mode > USR_MODE;;
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}
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static inline u32 kvm_vcpu_get_hsr(struct kvm_vcpu *vcpu)
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static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hsr;
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}
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static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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if (hsr & HSR_CV)
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return (hsr & HSR_COND) >> HSR_COND_SHIFT;
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return -1;
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}
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static inline unsigned long kvm_vcpu_get_hfar(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.fault.hxfar;
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@ -21,6 +21,7 @@ obj-$(CONFIG_KVM_ARM_HOST) += hyp/
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obj-y += kvm-arm.o init.o interrupts.o
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obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o
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obj-y += coproc.o coproc_a15.o coproc_a7.o mmio.o psci.o perf.o
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obj-y += $(KVM)/arm/aarch32.o
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obj-y += $(KVM)/arm/vgic/vgic.o
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obj-y += $(KVM)/arm/vgic/vgic-init.o
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@ -161,103 +161,6 @@ unsigned long *vcpu_spsr(struct kvm_vcpu *vcpu)
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}
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}
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/*
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* A conditional instruction is allowed to trap, even though it
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* wouldn't be executed. So let's re-implement the hardware, in
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* software!
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*/
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bool kvm_condition_valid(struct kvm_vcpu *vcpu)
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{
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unsigned long cpsr, cond, insn;
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/*
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* Exception Code 0 can only happen if we set HCR.TGE to 1, to
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* catch undefined instructions, and then we won't get past
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* the arm_exit_handlers test anyway.
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*/
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BUG_ON(!kvm_vcpu_trap_get_class(vcpu));
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/* Top two bits non-zero? Unconditional. */
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if (kvm_vcpu_get_hsr(vcpu) >> 30)
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return true;
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cpsr = *vcpu_cpsr(vcpu);
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/* Is condition field valid? */
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if ((kvm_vcpu_get_hsr(vcpu) & HSR_CV) >> HSR_CV_SHIFT)
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cond = (kvm_vcpu_get_hsr(vcpu) & HSR_COND) >> HSR_COND_SHIFT;
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else {
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/* This can happen in Thumb mode: examine IT state. */
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unsigned long it;
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it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3);
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/* it == 0 => unconditional. */
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if (it == 0)
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return true;
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/* The cond for this insn works out as the top 4 bits. */
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cond = (it >> 4);
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}
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/* Shift makes it look like an ARM-mode instruction */
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insn = cond << 28;
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return arm_check_condition(insn, cpsr) != ARM_OPCODE_CONDTEST_FAIL;
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}
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/**
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* adjust_itstate - adjust ITSTATE when emulating instructions in IT-block
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* @vcpu: The VCPU pointer
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*
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* When exceptions occur while instructions are executed in Thumb IF-THEN
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* blocks, the ITSTATE field of the CPSR is not advanced (updated), so we have
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* to do this little bit of work manually. The fields map like this:
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*
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* IT[7:0] -> CPSR[26:25],CPSR[15:10]
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*/
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static void kvm_adjust_itstate(struct kvm_vcpu *vcpu)
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{
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unsigned long itbits, cond;
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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bool is_arm = !(cpsr & PSR_T_BIT);
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if (is_arm || !(cpsr & PSR_IT_MASK))
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return;
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cond = (cpsr & 0xe000) >> 13;
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itbits = (cpsr & 0x1c00) >> (10 - 2);
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itbits |= (cpsr & (0x3 << 25)) >> 25;
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/* Perform ITAdvance (see page A-52 in ARM DDI 0406C) */
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if ((itbits & 0x7) == 0)
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itbits = cond = 0;
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else
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itbits = (itbits << 1) & 0x1f;
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cpsr &= ~PSR_IT_MASK;
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cpsr |= cond << 13;
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cpsr |= (itbits & 0x1c) << (10 - 2);
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cpsr |= (itbits & 0x3) << 25;
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*vcpu_cpsr(vcpu) = cpsr;
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}
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/**
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* kvm_skip_instr - skip a trapped instruction and proceed to the next
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* @vcpu: The vcpu pointer
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*/
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void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
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{
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bool is_thumb;
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is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_T_BIT);
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if (is_thumb && !is_wide_instr)
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*vcpu_pc(vcpu) += 2;
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else
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*vcpu_pc(vcpu) += 4;
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kvm_adjust_itstate(vcpu);
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}
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/******************************************************************************
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* Inject exceptions into the guest
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*/
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@ -24,6 +24,11 @@
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#include <linux/kvm_host.h>
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#include <asm/kvm_emulate.h>
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#ifndef CONFIG_ARM64
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#define COMPAT_PSR_T_BIT PSR_T_BIT
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#define COMPAT_PSR_IT_MASK PSR_IT_MASK
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#endif
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/*
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* stolen from arch/arm/kernel/opcodes.c
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*
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