Qualcomm ARM64 Updates for v4.6
* Add MSM8996 support * Cleanups for MSM8916 * Updates for APQ8016 SBC * Fixup pmic reg properties * Add RPMCC node for 8916 * Add LPASS audio nodes * Add USB support on MSM8916 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW1MPFAAoJEFKiBbHx2RXVdVUP/0OG6hYYbVm8ZjpVnl1OyL95 XQBUB1nK1ZhsiPddkmAPVKybMWYS/ZGrBQO37MYi9oJpmyQMvKJojqvagbnmD6SB Mq9gb9WZp6uLjJSRT/aP5eJLxjkOJbojb7DaBCaqci+X4RKsPOVQK3LgTUkr9/qC yAuC8I/UWPY/PU3cvHZ8EAen+9nK5iXtBWuW5lGoAJG9IWgt3Nj8DRd2zS/7X0vn Yeq3FCPO8RBdYOlEopOw5ij9/+7Ytme0jpqP0P7q3yEaPNexp+EJXQNyU6wBmdH+ 5aozKIkjayRJQXZMB69hWgPZQAJ4csVU97K0WWdFtNyFhnAmBCgF9q18z1z1lkCp BnTk1+hw6jF39uBeGl2oQ3dVMHuSu8TLNWYEt8JLkW5HqaNSafsh0QxlK5loH/5d 62753YeQM0i9eK08IBfn1dexlKpjoH0sUGVtGsr3ll853+h7gNpKnkHydanhNPE5 5IuyxOwOmgglygCL27aplXN2PbGVbZ3LDv4Slcqdk5Cvgssa2ANOVBuQ20R/4cVu B/Eqdw94xuYUHTAMJpb1uYi+stwlpeghNyMU7hLhHwvtoA75ek4tdw7NVt7zA+7p WEzlLEwkwhY0IgZ88CAdGEMKHcjQgS7pBXkfZws519Zs+ONle9WWmo6I2/CyuCyd DkKi9TvBV7E13uSacy81 =YweL -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64 Merge "Qualcomm ARM64 Updates for v4.6" from Andy Gross: * Add MSM8996 support * Cleanups for MSM8916 * Updates for APQ8016 SBC * Fixup pmic reg properties * Add RPMCC node for 8916 * Add LPASS audio nodes * Add USB support on MSM8916 * tag 'qcom-arm64-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (24 commits) arm64: dts: qcom: Fix MPP's function used for LED control arm64: dts: qcom: fix usb digital voltage levels arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c arm64: dts: qcom: add lpass node arm64: dts: qcom: add audio pinctrls arm64: dts: qcom: apq8016-sbc: add usb support arm64: dts: qcom: add manual pullup setting to otg. arm64: dts: qcom: msm8916: Add RPMCC DT node ARM64: dts: qcom: Remove size elements from pmic reg properties arm64: dts: msm8996: Add #power-domain-cells property arm64: dts: apq8016-sbc: Add real regulators and pinctrl for sdhc arm64: dts: apq8016-sbc: move sdhci node under soc node arm64: dts: apq8016-sbc: make 1.8v available on LS expansion arm64: dts: apq8016-sbc: add regulators support arm64: dts: qcom: add lable for smd rpm regulators arm64: dts: remove s2 regulator from smd regulators. arm64: dts: qcom: add correct drive strenght on cs pins arm64: dts: qcom: remove redundant spi cs pins from pinconf arm64: dts: apq8016-sbc: Add aliases to spi device. arm64: dts: Add L2 cache node to msm8916 ...
This commit is contained in:
Arnd Bergmann
commit
3bbf58531f
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@ -1,4 +1,5 @@
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dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb msm8916-mtp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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@ -33,7 +33,7 @@ &pm8916_mpps {
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pm8916_mpps_leds: pm8916_mpps_leds {
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pinconf {
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pins = "mpp2", "mpp3";
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function = PMIC_GPIO_FUNC_NORMAL;
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function = "digital";
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output-low;
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};
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};
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@ -10,4 +10,18 @@ pinconf {
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output-low;
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};
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};
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usb_id_default: usb-id-default {
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pinmux {
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function = "gpio";
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pins = "gpio121";
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};
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pinconf {
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pins = "gpio121";
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drive-strength = <8>;
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input-enable;
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bias-pull-up;
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};
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};
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};
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@ -24,6 +24,8 @@ aliases {
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i2c0 = &blsp_i2c2;
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i2c1 = &blsp_i2c6;
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i2c3 = &blsp_i2c4;
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spi0 = &blsp_spi5;
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spi1 = &blsp_spi3;
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};
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chosen {
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@ -127,9 +129,173 @@ led@6 {
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default-state = "off";
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};
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};
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sdhci@07824000 {
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vmmc-supply = <&pm8916_l8>;
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vqmmc-supply = <&pm8916_l5>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
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pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
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status = "okay";
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};
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usb@78d9000 {
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extcon = <&usb_id>, <&usb_id>;
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status = "okay";
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};
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ehci@78d9000 {
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status = "okay";
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};
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phy@78d9000 {
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v1p8-supply = <&pm8916_l7>;
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v3p3-supply = <&pm8916_l13>;
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vddcx-supply = <&pm8916_s1>;
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extcon = <&usb_id>, <&usb_id>;
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dr_mode = "otg";
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status = "okay";
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switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_sw_sel_pm>;
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};
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lpass@07708000 {
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status = "okay";
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};
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};
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usb2513 {
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compatible = "smsc,usb3503";
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reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
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initial-mode = <1>;
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};
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usb_id: usb-id {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_id_default>;
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};
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};
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&sdhc_1 {
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status = "okay";
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&smd_rpm_regulators {
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vdd_l1_l2_l3-supply = <&pm8916_s3>;
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vdd_l5-supply = <&pm8916_s3>;
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vdd_l4_l5_l6-supply = <&pm8916_s4>;
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vdd_l7-supply = <&pm8916_s4>;
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s1 {
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regulator-min-microvolt = <375000>;
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regulator-max-microvolt = <1562000>;
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};
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s3 {
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regulator-min-microvolt = <375000>;
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regulator-max-microvolt = <1562000>;
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};
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s4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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l1 {
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regulator-min-microvolt = <375000>;
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regulator-max-microvolt = <1525000>;
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};
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l2 {
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regulator-min-microvolt = <375000>;
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regulator-max-microvolt = <1525000>;
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};
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l3 {
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regulator-min-microvolt = <375000>;
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regulator-max-microvolt = <1525000>;
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};
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l4 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l5 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l6 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l7 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l8 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l9 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l10 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l11 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l12 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l13 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l14 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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/**
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* 1.8v required on LS expansion
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* for mezzanine boards
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*/
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l15 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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regulator-always-on;
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};
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l16 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l17 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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l18 {
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regulator-min-microvolt = <1750000>;
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regulator-max-microvolt = <3337000>;
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};
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};
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@ -82,7 +82,7 @@ pinconf {
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};
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pinconf_cs {
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pins = "gpio2";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -110,13 +110,13 @@ pinmux_cs {
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pins = "gpio6";
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};
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pinconf {
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pins = "gpio4", "gpio5", "gpio6", "gpio7";
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pins = "gpio4", "gpio5", "gpio7";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio6";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -144,13 +144,13 @@ pinmux_cs {
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pins = "gpio10";
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};
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pinconf {
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pins = "gpio8", "gpio9", "gpio10", "gpio11";
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pins = "gpio8", "gpio9", "gpio11";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio10";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -178,13 +178,13 @@ pinmux_cs {
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pins = "gpio14";
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};
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pinconf {
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pins = "gpio12", "gpio13", "gpio14", "gpio15";
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pins = "gpio12", "gpio13", "gpio15";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio14";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -212,13 +212,13 @@ pinmux_cs {
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pins = "gpio18";
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};
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pinconf {
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pins = "gpio16", "gpio17", "gpio18", "gpio19";
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pins = "gpio16", "gpio17", "gpio19";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio18";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -246,13 +246,13 @@ pinmux_cs {
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pins = "gpio22";
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};
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pinconf {
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pins = "gpio20", "gpio21", "gpio22", "gpio23";
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pins = "gpio20", "gpio21", "gpio23";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio22";
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drive-strength = <2>;
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drive-strength = <16>;
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bias-disable;
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output-high;
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};
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@ -504,4 +504,220 @@ pinconf {
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};
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};
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};
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ext-codec-lines {
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ext_codec_lines_act: lines_on {
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pinmux {
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function = "gpio";
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pins = "gpio67";
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};
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pinconf {
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pins = "gpio67";
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drive-strength = <8>;
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bias-disable;
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output-high;
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};
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};
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ext_codec_lines_sus: lines_off {
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pinmux {
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function = "gpio";
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pins = "gpio67";
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};
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pinconf {
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pins = "gpio67";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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cdc-pdm-lines {
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cdc_pdm_lines_act: pdm_lines_on {
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pinmux {
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function = "cdc_pdm0";
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pins = "gpio63", "gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68";
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};
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pinconf {
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pins = "gpio63", "gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68";
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drive-strength = <8>;
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bias-pull-none;
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};
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};
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cdc_pdm_lines_sus: pdm_lines_off {
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pinmux {
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function = "cdc_pdm0";
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pins = "gpio63", "gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68";
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};
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pinconf {
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pins = "gpio63", "gpio64", "gpio65", "gpio66",
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"gpio67", "gpio68";
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drive-strength = <2>;
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bias-disable;
|
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};
|
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};
|
||||
};
|
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|
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ext-pri-tlmm-lines {
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ext_pri_tlmm_lines_act: ext_pa_on {
|
||||
pinmux {
|
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function = "pri_mi2s";
|
||||
pins = "gpio113", "gpio114", "gpio115",
|
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"gpio116";
|
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};
|
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pinconf {
|
||||
pins = "gpio113", "gpio114", "gpio115",
|
||||
"gpio116";
|
||||
drive-strength = <8>;
|
||||
bias-pull-none;
|
||||
};
|
||||
};
|
||||
|
||||
ext_pri_tlmm_lines_sus: ext_pa_off {
|
||||
pinmux {
|
||||
function = "pri_mi2s";
|
||||
pins = "gpio113", "gpio114", "gpio115",
|
||||
"gpio116";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio113", "gpio114", "gpio115",
|
||||
"gpio116";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ext-pri-ws-line {
|
||||
ext_pri_ws_act: ext_pa_on {
|
||||
pinmux {
|
||||
function = "pri_mi2s_ws";
|
||||
pins = "gpio110";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio110";
|
||||
drive-strength = <8>;
|
||||
bias-pull-none;
|
||||
};
|
||||
};
|
||||
|
||||
ext_pri_ws_sus: ext_pa_off {
|
||||
pinmux {
|
||||
function = "pri_mi2s_ws";
|
||||
pins = "gpio110";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio110";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ext-mclk-tlmm-lines {
|
||||
ext_mclk_tlmm_lines_act: mclk_lines_on {
|
||||
pinmux {
|
||||
function = "pri_mi2s";
|
||||
pins = "gpio116";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio116";
|
||||
drive-strength = <8>;
|
||||
bias-pull-none;
|
||||
};
|
||||
};
|
||||
ext_mclk_tlmm_lines_sus: mclk_lines_off {
|
||||
pinmux {
|
||||
function = "pri_mi2s";
|
||||
pins = "gpio116";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio116";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* secondary Mi2S */
|
||||
ext-sec-tlmm-lines {
|
||||
ext_sec_tlmm_lines_act: tlmm_lines_on {
|
||||
pinmux {
|
||||
function = "sec_mi2s";
|
||||
pins = "gpio112", "gpio117", "gpio118",
|
||||
"gpio119";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio112", "gpio117", "gpio118",
|
||||
"gpio119";
|
||||
drive-strength = <8>;
|
||||
bias-pull-none;
|
||||
};
|
||||
};
|
||||
ext_sec_tlmm_lines_sus: tlmm_lines_off {
|
||||
pinmux {
|
||||
function = "sec_mi2s";
|
||||
pins = "gpio112", "gpio117", "gpio118",
|
||||
"gpio119";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio112", "gpio117", "gpio118",
|
||||
"gpio119";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cdc-dmic-lines {
|
||||
cdc_dmic_lines_act: dmic_lines_on {
|
||||
pinmux_dmic0_clk {
|
||||
function = "dmic0_clk";
|
||||
pins = "gpio0";
|
||||
};
|
||||
pinmux_dmic0_data {
|
||||
function = "dmic0_data";
|
||||
pins = "gpio1";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio0", "gpio1";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
cdc_dmic_lines_sus: dmic_lines_off {
|
||||
pinconf {
|
||||
pins = "gpio0", "gpio1";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cross-conn-det {
|
||||
cross_conn_det_act: lines_on {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio120";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio120";
|
||||
drive-strength = <8>;
|
||||
output-low;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
cross_conn_det_sus: lines_off {
|
||||
pinmux {
|
||||
function = "gpio";
|
||||
pins = "gpio120";
|
||||
};
|
||||
pinconf {
|
||||
pins = "gpio120";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -61,24 +61,33 @@ CPU0: cpu@0 {
|
|||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x1>;
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x2>;
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x3>;
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
L2_0: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -134,7 +143,7 @@ msmgpio: pinctrl@1000000 {
|
|||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gcc: qcom,gcc@1800000 {
|
||||
gcc: clock-controller@1800000 {
|
||||
compatible = "qcom,gcc-msm8916";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
@ -343,6 +352,32 @@ blsp_i2c6: i2c@78ba000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
lpass: lpass@07708000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,lpass-cpu-apq8016";
|
||||
clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
|
||||
<&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
|
||||
|
||||
clock-names = "ahbix-clk",
|
||||
"pcnoc-mport-clk",
|
||||
"pcnoc-sway-clk",
|
||||
"mi2s-bit-clk0",
|
||||
"mi2s-bit-clk1",
|
||||
"mi2s-bit-clk2",
|
||||
"mi2s-bit-clk3";
|
||||
#sound-dai-cells = <1>;
|
||||
|
||||
interrupts = <0 160 0>;
|
||||
interrupt-names = "lpass-irq-lpaif";
|
||||
reg = <0x07708000 0x10000>;
|
||||
reg-names = "lpass-lpaif";
|
||||
};
|
||||
|
||||
sdhc_1: sdhci@07824000 {
|
||||
compatible = "qcom,sdhci-msm-v4";
|
||||
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
|
||||
|
|
@ -395,10 +430,11 @@ usb_otg: phy@78d9000 {
|
|||
interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
|
||||
<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,vdd-levels = <1 5 7>;
|
||||
qcom,vdd-levels = <500000 1000000 1320000>;
|
||||
qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
|
||||
dr_mode = "peripheral";
|
||||
qcom,otg-control = <2>; // PMIC
|
||||
qcom,manual-pullup;
|
||||
|
||||
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
|
||||
<&gcc GCC_USB_HS_SYSTEM_CLK>,
|
||||
|
|
@ -515,11 +551,15 @@ rpm_requests {
|
|||
compatible = "qcom,rpm-msm8916";
|
||||
qcom,smd-channels = "rpm_requests";
|
||||
|
||||
pm8916-regulators {
|
||||
rpmcc: qcom,rpmcc {
|
||||
compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
smd_rpm_regulators: pm8916-regulators {
|
||||
compatible = "qcom,rpm-pm8916-regulators";
|
||||
|
||||
pm8916_s1: s1 {};
|
||||
pm8916_s2: s2 {};
|
||||
pm8916_s3: s3 {};
|
||||
pm8916_s4: s4 {};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "msm8996-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. MSM 8996 MTP";
|
||||
compatible = "qcom,msm8996-mtp";
|
||||
};
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include "msm8996.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial0 = &blsp2_uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
};
|
||||
|
||||
soc {
|
||||
serial@75b0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,269 @@
|
|||
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. MSM8996";
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
chosen { };
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* We expect the bootloader to fill in the reg */
|
||||
reg = <0 0 0 0>;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_0>;
|
||||
};
|
||||
|
||||
CPU2: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
CPU3: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "psci";
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&CPU0>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&CPU1>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&CPU2>;
|
||||
};
|
||||
|
||||
core1 {
|
||||
cpu = <&CPU3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
xo_board {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <19200000>;
|
||||
clock-output-names = "xo_board";
|
||||
};
|
||||
|
||||
sleep_clk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32764>;
|
||||
clock-output-names = "sleep_clk";
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0 0xffffffff>;
|
||||
compatible = "simple-bus";
|
||||
|
||||
intc: interrupt-controller@9bc0000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
#redistributor-regions = <1>;
|
||||
redistributor-stride = <0x0 0x40000>;
|
||||
reg = <0x09bc0000 0x10000>,
|
||||
<0x09c00000 0x100000>;
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@300000 {
|
||||
compatible = "qcom,gcc-msm8996";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
reg = <0x300000 0x90000>;
|
||||
};
|
||||
|
||||
blsp2_uart1: serial@75b0000 {
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0x75b0000 0x1000>;
|
||||
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
|
||||
<&gcc GCC_BLSP2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl@1010000 {
|
||||
compatible = "qcom,msm8996-pinctrl";
|
||||
reg = <0x01010000 0x300000>;
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
timer@09840000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
compatible = "arm,armv7-timer-mem";
|
||||
reg = <0x09840000 0x1000>;
|
||||
clock-frequency = <19200000>;
|
||||
|
||||
frame@9850000 {
|
||||
frame-number = <0>;
|
||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x09850000 0x1000>,
|
||||
<0x09860000 0x1000>;
|
||||
};
|
||||
|
||||
frame@9870000 {
|
||||
frame-number = <1>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x09870000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@9880000 {
|
||||
frame-number = <2>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x09880000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@9890000 {
|
||||
frame-number = <3>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x09890000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@98a0000 {
|
||||
frame-number = <4>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x098a0000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@98b0000 {
|
||||
frame-number = <5>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x098b0000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
frame@98c0000 {
|
||||
frame-number = <6>;
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x098c0000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
spmi_bus: qcom,spmi@400f000 {
|
||||
compatible = "qcom,spmi-pmic-arb";
|
||||
reg = <0x400f000 0x1000>,
|
||||
<0x4400000 0x800000>,
|
||||
<0x4c00000 0x800000>,
|
||||
<0x5800000 0x200000>,
|
||||
<0x400a000 0x002100>;
|
||||
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
|
||||
interrupt-names = "periph_irq";
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
|
||||
qcom,ee = <0>;
|
||||
qcom,channel = <0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <4>;
|
||||
};
|
||||
|
||||
mmcc: clock-controller@8c0000 {
|
||||
compatible = "qcom,mmcc-msm8996";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
reg = <0x8c0000 0x40000>;
|
||||
assigned-clocks = <&mmcc MMPLL9_PLL>,
|
||||
<&mmcc MMPLL1_PLL>,
|
||||
<&mmcc MMPLL3_PLL>,
|
||||
<&mmcc MMPLL4_PLL>,
|
||||
<&mmcc MMPLL5_PLL>;
|
||||
assigned-clock-rates = <624000000>,
|
||||
<810000000>,
|
||||
<980000000>,
|
||||
<960000000>,
|
||||
<825000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
&spmi_bus {
|
||||
|
||||
pmic@4 {
|
||||
compatible = "qcom,pm8004", "qcom,spmi-pmic";
|
||||
reg = <0x4 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
pmic@5 {
|
||||
compatible = "qcom,pm8004", "qcom,spmi-pmic";
|
||||
reg = <0x5 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -12,7 +12,7 @@ pm8916_0: pm8916@0 {
|
|||
|
||||
rtc@6000 {
|
||||
compatible = "qcom,pm8941-rtc";
|
||||
reg = <0x6000 0x6100>;
|
||||
reg = <0x6000>;
|
||||
reg-names = "rtc", "alarm";
|
||||
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
|
@ -27,7 +27,7 @@ pwrkey@800 {
|
|||
|
||||
pm8916_gpios: gpios@c000 {
|
||||
compatible = "qcom,pm8916-gpio";
|
||||
reg = <0xc000 0x400>;
|
||||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
|
||||
|
|
@ -38,7 +38,7 @@ pm8916_gpios: gpios@c000 {
|
|||
|
||||
pm8916_mpps: mpps@a000 {
|
||||
compatible = "qcom,pm8916-mpp";
|
||||
reg = <0xa000 0x400>;
|
||||
reg = <0xa000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
|
||||
|
|
@ -49,7 +49,7 @@ pm8916_mpps: mpps@a000 {
|
|||
|
||||
pm8916_temp: temp-alarm@2400 {
|
||||
compatible = "qcom,spmi-temp-alarm";
|
||||
reg = <0x2400 0x100>;
|
||||
reg = <0x2400>;
|
||||
interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
|
||||
io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
|
||||
io-channel-names = "thermal";
|
||||
|
|
@ -58,7 +58,7 @@ pm8916_temp: temp-alarm@2400 {
|
|||
|
||||
pm8916_vadc: vadc@3100 {
|
||||
compatible = "qcom,spmi-vadc";
|
||||
reg = <0x3100 0x100>;
|
||||
reg = <0x3100>;
|
||||
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,62 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
&spmi_bus {
|
||||
|
||||
pmic@0 {
|
||||
compatible = "qcom,pm8994", "qcom,spmi-pmic";
|
||||
reg = <0x0 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pm8994_gpios: gpios@c000 {
|
||||
compatible = "qcom,pm8994-gpio";
|
||||
reg = <0xc000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc1 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc2 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc3 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc4 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc5 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc6 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc7 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc8 0 IRQ_TYPE_NONE>,
|
||||
<0 0xc9 0 IRQ_TYPE_NONE>,
|
||||
<0 0xca 0 IRQ_TYPE_NONE>,
|
||||
<0 0xcb 0 IRQ_TYPE_NONE>,
|
||||
<0 0xcc 0 IRQ_TYPE_NONE>,
|
||||
<0 0xcd 0 IRQ_TYPE_NONE>,
|
||||
<0 0xce 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd0 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd1 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd2 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd3 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd4 0 IRQ_TYPE_NONE>,
|
||||
<0 0xd5 0 IRQ_TYPE_NONE>;
|
||||
};
|
||||
|
||||
pm8994_mpps: mpps@a000 {
|
||||
compatible = "qcom,pm8994-mpp";
|
||||
reg = <0xa000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa1 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa2 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa3 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa4 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa5 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa6 0 IRQ_TYPE_NONE>,
|
||||
<0 0xa7 0 IRQ_TYPE_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic@1 {
|
||||
compatible = "qcom,pm8994", "qcom,spmi-pmic";
|
||||
reg = <0x1 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
&spmi_bus {
|
||||
|
||||
pmic@2 {
|
||||
compatible = "qcom,pmi8994", "qcom,spmi-pmic";
|
||||
reg = <0x2 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
pmic@3 {
|
||||
compatible = "qcom,pmi8994", "qcom,spmi-pmic";
|
||||
reg = <0x3 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue