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drm/exynos: add ratio calculation 

Calculation ratio from exynos_drm plane codes, then each hw drivers can
use it without extra operation. Also this fixes width and height of
source used for actual crtc shown via screen.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Joonyoung Shim 2015-04-07 15:59:39 +09:00 committed by Inki Dae
parent cb8a3db29f
commit 3cabaf7ea7
3 changed files with 12 additions and 9 deletions
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4
drivers/gpu/drm/exynos/exynos_drm_drv.h
View File

@ -61,6 +61,8 @@ enum exynos_drm_output_type {
* @crtc_height: window height to be displayed (hardware screen). * @crtc_height: window height to be displayed (hardware screen).
* @mode_width: width of screen mode. * @mode_width: width of screen mode.
* @mode_height: height of screen mode. * @mode_height: height of screen mode.
* @h_ratio: horizontal scaling ratio, 16.16 fixed point
* @v_ratio: vertical scaling ratio, 16.16 fixed point
* @refresh: refresh rate. * @refresh: refresh rate.
* @scan_flag: interlace or progressive way. * @scan_flag: interlace or progressive way.
* (it could be DRM_MODE_FLAG_*) * (it could be DRM_MODE_FLAG_*)
@ -97,6 +99,8 @@ struct exynos_drm_plane {
unsigned int crtc_height; unsigned int crtc_height;
unsigned int mode_width; unsigned int mode_width;
unsigned int mode_height; unsigned int mode_height;
unsigned int h_ratio;
unsigned int v_ratio;
unsigned int refresh; unsigned int refresh;
unsigned int scan_flag; unsigned int scan_flag;
unsigned int bpp; unsigned int bpp;

8
drivers/gpu/drm/exynos/exynos_drm_plane.c
View File

@ -110,11 +110,15 @@ void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
crtc_y = 0; crtc_y = 0;
} }
/* set ratio */
exynos_plane->h_ratio = (src_w << 16) / crtc_w;
exynos_plane->v_ratio = (src_h << 16) / crtc_h;
/* set drm framebuffer data. */ /* set drm framebuffer data. */
exynos_plane->src_x = src_x; exynos_plane->src_x = src_x;
exynos_plane->src_y = src_y; exynos_plane->src_y = src_y;
exynos_plane->src_width = src_w; exynos_plane->src_width = (actual_w * exynos_plane->h_ratio) >> 16;
exynos_plane->src_height = src_h; exynos_plane->src_height = (actual_h * exynos_plane->v_ratio) >> 16;
exynos_plane->fb_width = fb->width; exynos_plane->fb_width = fb->width;
exynos_plane->fb_height = fb->height; exynos_plane->fb_height = fb->height;
exynos_plane->bpp = fb->bits_per_pixel; exynos_plane->bpp = fb->bits_per_pixel;

9
drivers/gpu/drm/exynos/exynos_mixer.c
View File

@ -382,7 +382,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
struct mixer_resources *res = &ctx->mixer_res; struct mixer_resources *res = &ctx->mixer_res;
unsigned long flags; unsigned long flags;
struct exynos_drm_plane *plane; struct exynos_drm_plane *plane;
unsigned int x_ratio, y_ratio;
unsigned int buf_num = 1; unsigned int buf_num = 1;
dma_addr_t luma_addr[2], chroma_addr[2]; dma_addr_t luma_addr[2], chroma_addr[2];
bool tiled_mode = false; bool tiled_mode = false;
@ -407,10 +406,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
return; return;
} }
/* scaling feature: (src << 16) / dst */
x_ratio = (plane->src_width << 16) / plane->crtc_width;
y_ratio = (plane->src_height << 16) / plane->crtc_height;
if (buf_num == 2) { if (buf_num == 2) {
luma_addr[0] = plane->dma_addr[0]; luma_addr[0] = plane->dma_addr[0];
chroma_addr[0] = plane->dma_addr[1]; chroma_addr[0] = plane->dma_addr[1];
@ -470,8 +465,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
vp_reg_write(res, VP_DST_V_POSITION, plane->crtc_y); vp_reg_write(res, VP_DST_V_POSITION, plane->crtc_y);
} }
vp_reg_write(res, VP_H_RATIO, x_ratio); vp_reg_write(res, VP_H_RATIO, plane->h_ratio);
vp_reg_write(res, VP_V_RATIO, y_ratio); vp_reg_write(res, VP_V_RATIO, plane->v_ratio);
vp_reg_write(res, VP_ENDIAN_MODE, VP_ENDIAN_MODE_LITTLE); vp_reg_write(res, VP_ENDIAN_MODE, VP_ENDIAN_MODE_LITTLE);