iio: adc: Add TI ADS8688
This patch adds support for the Texas Intruments ADS8688 ADC. Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Reviewed-by: Martin Hundebøll <martin.hundeboll@prevas.dk> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Sean Nyekjaer
Jonathan Cameron
parent
f47dff3230
commit
3e87e78383
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@ -341,6 +341,16 @@ config TI_ADC128S052
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This driver can also be built as a module. If so, the module will be
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called ti-adc128s052.
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config TI_ADS8688
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tristate "Texas Instruments ADS8688"
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depends on SPI && OF
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help
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If you say yes here you get support for Texas Instruments ADS8684 and
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and ADS8688 ADC chips
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This driver can also be built as a module. If so, the module will be
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called ti-ads8688.
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config TI_AM335X_ADC
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tristate "TI's AM335X ADC driver"
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depends on MFD_TI_AM335X_TSCADC
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@ -33,6 +33,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
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obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
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obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
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obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
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obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
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obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
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obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
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obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
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@ -0,0 +1,486 @@
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/*
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* Copyright (C) 2015 Prevas A/S
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#define ADS8688_CMD_REG(x) (x << 8)
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#define ADS8688_CMD_REG_NOOP 0x00
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#define ADS8688_CMD_REG_RST 0x85
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#define ADS8688_CMD_REG_MAN_CH(chan) (0xC0 | (4 * chan))
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#define ADS8688_CMD_DONT_CARE_BITS 16
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#define ADS8688_PROG_REG(x) (x << 9)
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#define ADS8688_PROG_REG_RANGE_CH(chan) (0x05 + chan)
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#define ADS8688_PROG_WR_BIT BIT(8)
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#define ADS8688_PROG_DONT_CARE_BITS 8
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#define ADS8688_REG_PLUSMINUS25VREF 0
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#define ADS8688_REG_PLUSMINUS125VREF 1
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#define ADS8688_REG_PLUSMINUS0625VREF 2
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#define ADS8688_REG_PLUS25VREF 5
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#define ADS8688_REG_PLUS125VREF 6
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#define ADS8688_VREF_MV 4096
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#define ADS8688_REALBITS 16
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/*
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* enum ads8688_range - ADS8688 reference voltage range
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* @ADS8688_PLUSMINUS25VREF: Device is configured for input range ±2.5 * VREF
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* @ADS8688_PLUSMINUS125VREF: Device is configured for input range ±1.25 * VREF
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* @ADS8688_PLUSMINUS0625VREF: Device is configured for input range ±0.625 * VREF
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* @ADS8688_PLUS25VREF: Device is configured for input range 0 - 2.5 * VREF
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* @ADS8688_PLUS125VREF: Device is configured for input range 0 - 1.25 * VREF
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*/
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enum ads8688_range {
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ADS8688_PLUSMINUS25VREF,
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ADS8688_PLUSMINUS125VREF,
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ADS8688_PLUSMINUS0625VREF,
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ADS8688_PLUS25VREF,
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ADS8688_PLUS125VREF,
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};
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struct ads8688_chip_info {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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};
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struct ads8688_state {
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struct mutex lock;
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const struct ads8688_chip_info *chip_info;
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struct spi_device *spi;
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struct regulator *reg;
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unsigned int vref_mv;
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enum ads8688_range range[8];
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union {
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__be32 d32;
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u8 d8[4];
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} data[2] ____cacheline_aligned;
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};
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enum ads8688_id {
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ID_ADS8684,
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ID_ADS8688,
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};
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struct ads8688_ranges {
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enum ads8688_range range;
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unsigned int scale;
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int offset;
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u8 reg;
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};
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static const struct ads8688_ranges ads8688_range_def[5] = {
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{
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.range = ADS8688_PLUSMINUS25VREF,
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.scale = 76295,
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.offset = -(1 << (ADS8688_REALBITS - 1)),
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.reg = ADS8688_REG_PLUSMINUS25VREF,
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}, {
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.range = ADS8688_PLUSMINUS125VREF,
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.scale = 38148,
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.offset = -(1 << (ADS8688_REALBITS - 1)),
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.reg = ADS8688_REG_PLUSMINUS125VREF,
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}, {
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.range = ADS8688_PLUSMINUS0625VREF,
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.scale = 19074,
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.offset = -(1 << (ADS8688_REALBITS - 1)),
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.reg = ADS8688_REG_PLUSMINUS0625VREF,
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}, {
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.range = ADS8688_PLUS25VREF,
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.scale = 38148,
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.offset = 0,
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.reg = ADS8688_REG_PLUS25VREF,
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}, {
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.range = ADS8688_PLUS125VREF,
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.scale = 19074,
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.offset = 0,
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.reg = ADS8688_REG_PLUS125VREF,
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}
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};
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static ssize_t ads8688_show_scales(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct ads8688_state *st = iio_priv(dev_to_iio_dev(dev));
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return sprintf(buf, "0.%09u 0.%09u 0.%09u\n",
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ads8688_range_def[0].scale * st->vref_mv,
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ads8688_range_def[1].scale * st->vref_mv,
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ads8688_range_def[2].scale * st->vref_mv);
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}
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static ssize_t ads8688_show_offsets(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "%d %d\n", ads8688_range_def[0].offset,
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ads8688_range_def[3].offset);
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}
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static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
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ads8688_show_scales, NULL, 0);
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static IIO_DEVICE_ATTR(in_voltage_offset_available, S_IRUGO,
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ads8688_show_offsets, NULL, 0);
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static struct attribute *ads8688_attributes[] = {
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&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
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&iio_dev_attr_in_voltage_offset_available.dev_attr.attr,
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NULL,
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};
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static const struct attribute_group ads8688_attribute_group = {
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.attrs = ads8688_attributes,
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};
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#define ADS8688_CHAN(index) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
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| BIT(IIO_CHAN_INFO_SCALE) \
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| BIT(IIO_CHAN_INFO_OFFSET), \
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}
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static const struct iio_chan_spec ads8684_channels[] = {
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ADS8688_CHAN(0),
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ADS8688_CHAN(1),
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ADS8688_CHAN(2),
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ADS8688_CHAN(3),
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};
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static const struct iio_chan_spec ads8688_channels[] = {
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ADS8688_CHAN(0),
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ADS8688_CHAN(1),
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ADS8688_CHAN(2),
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ADS8688_CHAN(3),
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ADS8688_CHAN(4),
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ADS8688_CHAN(5),
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ADS8688_CHAN(6),
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ADS8688_CHAN(7),
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};
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static int ads8688_prog_write(struct iio_dev *indio_dev, unsigned int addr,
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unsigned int val)
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{
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struct ads8688_state *st = iio_priv(indio_dev);
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u32 tmp;
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tmp = ADS8688_PROG_REG(addr) | ADS8688_PROG_WR_BIT | val;
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tmp <<= ADS8688_PROG_DONT_CARE_BITS;
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st->data[0].d32 = cpu_to_be32(tmp);
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return spi_write(st->spi, &st->data[0].d8[1], 3);
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}
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static int ads8688_reset(struct iio_dev *indio_dev)
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{
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struct ads8688_state *st = iio_priv(indio_dev);
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u32 tmp;
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_RST);
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tmp <<= ADS8688_CMD_DONT_CARE_BITS;
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st->data[0].d32 = cpu_to_be32(tmp);
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return spi_write(st->spi, &st->data[0].d8[0], 4);
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}
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static int ads8688_read(struct iio_dev *indio_dev, unsigned int chan)
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{
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struct ads8688_state *st = iio_priv(indio_dev);
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int ret;
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u32 tmp;
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struct spi_transfer t[] = {
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{
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.tx_buf = &st->data[0].d8[0],
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.len = 4,
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.cs_change = 1,
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}, {
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.tx_buf = &st->data[1].d8[0],
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.rx_buf = &st->data[1].d8[0],
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.len = 4,
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},
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};
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_MAN_CH(chan));
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tmp <<= ADS8688_CMD_DONT_CARE_BITS;
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st->data[0].d32 = cpu_to_be32(tmp);
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tmp = ADS8688_CMD_REG(ADS8688_CMD_REG_NOOP);
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tmp <<= ADS8688_CMD_DONT_CARE_BITS;
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st->data[1].d32 = cpu_to_be32(tmp);
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ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
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if (ret < 0)
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return ret;
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return be32_to_cpu(st->data[1].d32) & 0xffff;
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}
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static int ads8688_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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int ret, offset;
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unsigned long scale_mv;
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struct ads8688_state *st = iio_priv(indio_dev);
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mutex_lock(&st->lock);
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = ads8688_read(indio_dev, chan->channel);
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mutex_unlock(&st->lock);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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scale_mv = st->vref_mv;
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scale_mv *= ads8688_range_def[st->range[chan->channel]].scale;
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*val = 0;
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*val2 = scale_mv;
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mutex_unlock(&st->lock);
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_CHAN_INFO_OFFSET:
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offset = ads8688_range_def[st->range[chan->channel]].offset;
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*val = offset;
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mutex_unlock(&st->lock);
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return IIO_VAL_INT;
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}
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mutex_unlock(&st->lock);
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return -EINVAL;
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}
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static int ads8688_write_reg_range(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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enum ads8688_range range)
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{
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unsigned int tmp;
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int ret;
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tmp = ADS8688_PROG_REG_RANGE_CH(chan->channel);
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ret = ads8688_prog_write(indio_dev, tmp, range);
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return ret;
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}
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static int ads8688_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct ads8688_state *st = iio_priv(indio_dev);
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unsigned int scale = 0;
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int ret = -EINVAL, i, offset = 0;
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mutex_lock(&st->lock);
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switch (mask) {
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case IIO_CHAN_INFO_SCALE:
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/* If the offset is 0 the ±2.5 * VREF mode is not available */
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offset = ads8688_range_def[st->range[chan->channel]].offset;
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if (offset == 0 && val2 == ads8688_range_def[0].scale * st->vref_mv) {
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mutex_unlock(&st->lock);
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return -EINVAL;
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}
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/* Lookup new mode */
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for (i = 0; i < ARRAY_SIZE(ads8688_range_def); i++)
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if (val2 == ads8688_range_def[i].scale * st->vref_mv &&
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offset == ads8688_range_def[i].offset) {
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ret = ads8688_write_reg_range(indio_dev, chan,
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ads8688_range_def[i].reg);
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break;
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}
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break;
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case IIO_CHAN_INFO_OFFSET:
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/*
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* There are only two available offsets:
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* 0 and -(1 << (ADS8688_REALBITS - 1))
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*/
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if (!(ads8688_range_def[0].offset == val ||
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ads8688_range_def[3].offset == val)) {
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mutex_unlock(&st->lock);
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return -EINVAL;
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}
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/*
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* If the device are in ±2.5 * VREF mode, it's not allowed to
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* switch to a mode where the offset is 0
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*/
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if (val == 0 &&
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st->range[chan->channel] == ADS8688_PLUSMINUS25VREF) {
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mutex_unlock(&st->lock);
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return -EINVAL;
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}
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scale = ads8688_range_def[st->range[chan->channel]].scale;
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/* Lookup new mode */
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for (i = 0; i < ARRAY_SIZE(ads8688_range_def); i++)
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if (val == ads8688_range_def[i].offset &&
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scale == ads8688_range_def[i].scale) {
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ret = ads8688_write_reg_range(indio_dev, chan,
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ads8688_range_def[i].reg);
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break;
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}
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break;
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}
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if (!ret)
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st->range[chan->channel] = ads8688_range_def[i].range;
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mutex_unlock(&st->lock);
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return ret;
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}
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static int ads8688_write_raw_get_fmt(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_SCALE:
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_CHAN_INFO_OFFSET:
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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static const struct iio_info ads8688_info = {
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.read_raw = &ads8688_read_raw,
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.write_raw = &ads8688_write_raw,
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.write_raw_get_fmt = &ads8688_write_raw_get_fmt,
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.attrs = &ads8688_attribute_group,
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.driver_module = THIS_MODULE,
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};
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static const struct ads8688_chip_info ads8688_chip_info_tbl[] = {
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[ID_ADS8684] = {
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.channels = ads8684_channels,
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.num_channels = ARRAY_SIZE(ads8684_channels),
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},
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[ID_ADS8688] = {
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.channels = ads8688_channels,
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.num_channels = ARRAY_SIZE(ads8688_channels),
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},
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};
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static int ads8688_probe(struct spi_device *spi)
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{
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struct ads8688_state *st;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->reg = devm_regulator_get_optional(&spi->dev, "vref");
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if (!IS_ERR(st->reg)) {
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ret = regulator_enable(st->reg);
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if (ret)
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return ret;
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ret = regulator_get_voltage(st->reg);
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if (ret < 0)
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goto error_out;
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st->vref_mv = ret / 1000;
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} else {
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/* Use internal reference */
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st->vref_mv = ADS8688_VREF_MV;
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}
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st->chip_info = &ads8688_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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spi->mode = SPI_MODE_1;
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spi_set_drvdata(spi, indio_dev);
|
||||
|
||||
st->spi = spi;
|
||||
|
||||
indio_dev->name = spi_get_device_id(spi)->name;
|
||||
indio_dev->dev.parent = &spi->dev;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->channels = st->chip_info->channels;
|
||||
indio_dev->num_channels = st->chip_info->num_channels;
|
||||
indio_dev->info = &ads8688_info;
|
||||
|
||||
ads8688_reset(indio_dev);
|
||||
|
||||
mutex_init(&st->lock);
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret)
|
||||
goto error_out;
|
||||
|
||||
return 0;
|
||||
|
||||
error_out:
|
||||
if (!IS_ERR_OR_NULL(st->reg))
|
||||
regulator_disable(st->reg);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ads8688_remove(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
||||
struct ads8688_state *st = iio_priv(indio_dev);
|
||||
|
||||
iio_device_unregister(indio_dev);
|
||||
|
||||
if (!IS_ERR_OR_NULL(st->reg))
|
||||
regulator_disable(st->reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_device_id ads8688_id[] = {
|
||||
{"ads8684", ID_ADS8684},
|
||||
{"ads8688", ID_ADS8688},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, ads8688_id);
|
||||
|
||||
static const struct of_device_id ads8688_of_match[] = {
|
||||
{ .compatible = "ti,ads8684" },
|
||||
{ .compatible = "ti,ads8688" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ads8688_of_match);
|
||||
|
||||
static struct spi_driver ads8688_driver = {
|
||||
.driver = {
|
||||
.name = "ads8688",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = ads8688_probe,
|
||||
.remove = ads8688_remove,
|
||||
.id_table = ads8688_id,
|
||||
};
|
||||
module_spi_driver(ads8688_driver);
|
||||
|
||||
MODULE_AUTHOR("Sean Nyekjaer <sean.nyekjaer@prevas.dk>");
|
||||
MODULE_DESCRIPTION("Texas Instruments ADS8688 driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue