x86/stackprotector/32: Make the canary into a regular percpu variable
On 32-bit kernels, the stackprotector canary is quite nasty -- it is stored at %gs:(20), which is nasty because 32-bit kernels use %fs for percpu storage. It's even nastier because it means that whether %gs contains userspace state or kernel state while running kernel code depends on whether stackprotector is enabled (this is CONFIG_X86_32_LAZY_GS), and this setting radically changes the way that segment selectors work. Supporting both variants is a maintenance and testing mess. Merely rearranging so that percpu and the stack canary share the same segment would be messy as the 32-bit percpu address layout isn't currently compatible with putting a variable at a fixed offset. Fortunately, GCC 8.1 added options that allow the stack canary to be accessed as %fs:__stack_chk_guard, effectively turning it into an ordinary percpu variable. This lets us get rid of all of the code to manage the stack canary GDT descriptor and the CONFIG_X86_32_LAZY_GS mess. (That name is special. We could use any symbol we want for the %fs-relative mode, but for CONFIG_SMP=n, gcc refuses to let us use any name other than __stack_chk_guard.) Forcibly disable stackprotector on older compilers that don't support the new options and turn the stack canary into a percpu variable. The "lazy GS" approach is now used for all 32-bit configurations. Also makes load_gs_index() work on 32-bit kernels. On 64-bit kernels, it loads the GS selector and updates the user GSBASE accordingly. (This is unchanged.) On 32-bit kernels, it loads the GS selector and updates GSBASE, which is now always the user base. This means that the overall effect is the same on 32-bit and 64-bit, which avoids some ifdeffery. [ bp: Massage commit message. ] Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/c0ff7dba14041c7e5d1cae5d4df052f03759bef3.1613243844.git.luto@kernel.org
This commit is contained in:
Andy Lutomirski
Borislav Petkov
parent
a38fd87484
commit
3fb0fdb3bb
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@ -360,10 +360,6 @@ config X86_64_SMP
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def_bool y
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depends on X86_64 && SMP
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config X86_32_LAZY_GS
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def_bool y
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depends on X86_32 && !STACKPROTECTOR
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config ARCH_SUPPORTS_UPROBES
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def_bool y
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@ -386,7 +382,8 @@ config CC_HAS_SANE_STACKPROTECTOR
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default $(success,$(srctree)/scripts/gcc-x86_32-has-stack-protector.sh $(CC))
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help
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We have to make sure stack protector is unconditionally disabled if
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the compiler produces broken code.
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the compiler produces broken code or if it does not let us control
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the segment on 32-bit kernels.
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menu "Processor type and features"
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@ -79,6 +79,14 @@ ifeq ($(CONFIG_X86_32),y)
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# temporary until string.h is fixed
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KBUILD_CFLAGS += -ffreestanding
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ifeq ($(CONFIG_STACKPROTECTOR),y)
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ifeq ($(CONFIG_SMP),y)
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KBUILD_CFLAGS += -mstack-protector-guard-reg=fs -mstack-protector-guard-symbol=__stack_chk_guard
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else
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KBUILD_CFLAGS += -mstack-protector-guard=global
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endif
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endif
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else
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BITS := 64
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UTS_MACHINE := x86_64
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@ -20,7 +20,7 @@
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* 1C(%esp) - %ds
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* 20(%esp) - %es
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* 24(%esp) - %fs
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* 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
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* 28(%esp) - unused -- was %gs on old stackprotector kernels
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* 2C(%esp) - orig_eax
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* 30(%esp) - %eip
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* 34(%esp) - %cs
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@ -56,14 +56,9 @@
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/*
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* User gs save/restore
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*
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* %gs is used for userland TLS and kernel only uses it for stack
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* canary which is required to be at %gs:20 by gcc. Read the comment
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* at the top of stackprotector.h for more info.
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*
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* Local labels 98 and 99 are used.
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* This is leftover junk from CONFIG_X86_32_LAZY_GS. A subsequent patch
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* will remove it entirely.
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*/
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#ifdef CONFIG_X86_32_LAZY_GS
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/* unfortunately push/pop can't be no-op */
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.macro PUSH_GS
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pushl $0
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@ -86,49 +81,6 @@
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.macro SET_KERNEL_GS reg
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.endm
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#else /* CONFIG_X86_32_LAZY_GS */
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.macro PUSH_GS
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pushl %gs
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.endm
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.macro POP_GS pop=0
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98: popl %gs
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.if \pop <> 0
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add $\pop, %esp
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.endif
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.endm
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.macro POP_GS_EX
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.pushsection .fixup, "ax"
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99: movl $0, (%esp)
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jmp 98b
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.popsection
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_ASM_EXTABLE(98b, 99b)
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.endm
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.macro PTGS_TO_GS
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98: mov PT_GS(%esp), %gs
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.endm
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.macro PTGS_TO_GS_EX
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.pushsection .fixup, "ax"
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99: movl $0, PT_GS(%esp)
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jmp 98b
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.popsection
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_ASM_EXTABLE(98b, 99b)
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.endm
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.macro GS_TO_REG reg
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movl %gs, \reg
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.endm
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.macro REG_TO_PTGS reg
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movl \reg, PT_GS(%esp)
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.endm
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.macro SET_KERNEL_GS reg
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movl $(__KERNEL_STACK_CANARY), \reg
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movl \reg, %gs
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.endm
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#endif /* CONFIG_X86_32_LAZY_GS */
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/* Unconditionally switch to user cr3 */
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.macro SWITCH_TO_USER_CR3 scratch_reg:req
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@ -779,7 +731,7 @@ SYM_CODE_START(__switch_to_asm)
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#ifdef CONFIG_STACKPROTECTOR
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movl TASK_stack_canary(%edx), %ebx
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movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
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movl %ebx, PER_CPU_VAR(__stack_chk_guard)
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#endif
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#ifdef CONFIG_RETPOLINE
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@ -439,6 +439,9 @@ struct fixed_percpu_data {
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* GCC hardcodes the stack canary as %gs:40. Since the
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* irq_stack is the object at %gs:0, we reserve the bottom
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* 48 bytes of the irq stack for the canary.
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*
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* Once we are willing to require -mstack-protector-guard-symbol=
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* support for x86_64 stackprotector, we can get rid of this.
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*/
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char gs_base[40];
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unsigned long stack_canary;
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@ -460,17 +463,7 @@ extern asmlinkage void ignore_sysret(void);
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void current_save_fsgs(void);
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#else /* X86_64 */
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#ifdef CONFIG_STACKPROTECTOR
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/*
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* Make sure stack canary segment base is cached-aligned:
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* "For Intel Atom processors, avoid non zero segment base address
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* that is not aligned to cache line boundary at all cost."
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* (Optim Ref Manual Assembly/Compiler Coding Rule 15.)
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*/
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struct stack_canary {
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char __pad[20]; /* canary at %gs:20 */
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unsigned long canary;
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};
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DECLARE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
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DECLARE_PER_CPU(unsigned long, __stack_chk_guard);
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#endif
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DECLARE_PER_CPU(struct irq_stack *, hardirq_stack_ptr);
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DECLARE_PER_CPU(struct irq_stack *, softirq_stack_ptr);
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@ -37,7 +37,10 @@ struct pt_regs {
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unsigned short __esh;
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unsigned short fs;
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unsigned short __fsh;
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/* On interrupt, gs and __gsh store the vector number. */
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/*
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* On interrupt, gs and __gsh store the vector number. They never
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* store gs any more.
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*/
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unsigned short gs;
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unsigned short __gsh;
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/* On interrupt, this is the error code. */
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@ -95,7 +95,7 @@
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*
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* 26 - ESPFIX small SS
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* 27 - per-cpu [ offset to per-cpu data area ]
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* 28 - stack_canary-20 [ for stack protector ] <=== cacheline #8
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* 28 - unused
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* 29 - unused
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* 30 - unused
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* 31 - TSS for double fault handler
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@ -118,7 +118,6 @@
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#define GDT_ENTRY_ESPFIX_SS 26
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#define GDT_ENTRY_PERCPU 27
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#define GDT_ENTRY_STACK_CANARY 28
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#define GDT_ENTRY_DOUBLEFAULT_TSS 31
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@ -158,12 +157,6 @@
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# define __KERNEL_PERCPU 0
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#endif
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#ifdef CONFIG_STACKPROTECTOR
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# define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY*8)
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#else
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# define __KERNEL_STACK_CANARY 0
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#endif
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#else /* 64-bit: */
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#include <asm/cache.h>
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@ -364,22 +357,15 @@ static inline void __loadsegment_fs(unsigned short value)
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asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
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/*
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* x86-32 user GS accessors:
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* x86-32 user GS accessors. This is ugly and could do with some cleaning up.
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*/
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#ifdef CONFIG_X86_32
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# ifdef CONFIG_X86_32_LAZY_GS
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# define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; })
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# define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
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# define task_user_gs(tsk) ((tsk)->thread.gs)
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# define lazy_save_gs(v) savesegment(gs, (v))
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# define lazy_load_gs(v) loadsegment(gs, (v))
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# else /* X86_32_LAZY_GS */
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# define get_user_gs(regs) (u16)((regs)->gs)
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# define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
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# define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
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# define lazy_save_gs(v) do { } while (0)
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# define lazy_load_gs(v) do { } while (0)
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# endif /* X86_32_LAZY_GS */
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# define get_user_gs(regs) (u16)({ unsigned long v; savesegment(gs, v); v; })
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# define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
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# define task_user_gs(tsk) ((tsk)->thread.gs)
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# define lazy_save_gs(v) savesegment(gs, (v))
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# define lazy_load_gs(v) loadsegment(gs, (v))
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# define load_gs_index(v) loadsegment(gs, (v))
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#endif /* X86_32 */
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#endif /* !__ASSEMBLY__ */
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@ -5,30 +5,23 @@
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* Stack protector works by putting predefined pattern at the start of
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* the stack frame and verifying that it hasn't been overwritten when
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* returning from the function. The pattern is called stack canary
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* and unfortunately gcc requires it to be at a fixed offset from %gs.
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* On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64
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* and x86_32 use segment registers differently and thus handles this
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* requirement differently.
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* and unfortunately gcc historically required it to be at a fixed offset
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* from the percpu segment base. On x86_64, the offset is 40 bytes.
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*
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* On x86_64, %gs is shared by percpu area and stack canary. All
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* percpu symbols are zero based and %gs points to the base of percpu
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* area. The first occupant of the percpu area is always
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* fixed_percpu_data which contains stack_canary at offset 40. Userland
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* %gs is always saved and restored on kernel entry and exit using
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* swapgs, so stack protector doesn't add any complexity there.
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* The same segment is shared by percpu area and stack canary. On
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* x86_64, percpu symbols are zero based and %gs (64-bit) points to the
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* base of percpu area. The first occupant of the percpu area is always
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* fixed_percpu_data which contains stack_canary at the approproate
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* offset. On x86_32, the stack canary is just a regular percpu
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* variable.
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*
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* On x86_32, it's slightly more complicated. As in x86_64, %gs is
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* used for userland TLS. Unfortunately, some processors are much
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* slower at loading segment registers with different value when
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* entering and leaving the kernel, so the kernel uses %fs for percpu
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* area and manages %gs lazily so that %gs is switched only when
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* necessary, usually during task switch.
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* Putting percpu data in %fs on 32-bit is a minor optimization compared to
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* using %gs. Since 32-bit userspace normally has %fs == 0, we are likely
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* to load 0 into %fs on exit to usermode, whereas with percpu data in
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* %gs, we are likely to load a non-null %gs on return to user mode.
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*
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* As gcc requires the stack canary at %gs:20, %gs can't be managed
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* lazily if stack protector is enabled, so the kernel saves and
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* restores userland %gs on kernel entry and exit. This behavior is
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* controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
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* system.h to hide the details.
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* Once we are willing to require GCC 8.1 or better for 64-bit stackprotector
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* support, we can remove some of this complexity.
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*/
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#ifndef _ASM_STACKPROTECTOR_H
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@ -44,14 +37,6 @@
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#include <linux/random.h>
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#include <linux/sched.h>
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/*
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* 24 byte read-only segment initializer for stack canary. Linker
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* can't handle the address bit shifting. Address will be set in
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* head_32 for boot CPU and setup_per_cpu_areas() for others.
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*/
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#define GDT_STACK_CANARY_INIT \
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[GDT_ENTRY_STACK_CANARY] = GDT_ENTRY_INIT(0x4090, 0, 0x18),
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/*
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* Initialize the stackprotector canary value.
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*
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@ -86,7 +71,7 @@ static __always_inline void boot_init_stack_canary(void)
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#ifdef CONFIG_X86_64
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this_cpu_write(fixed_percpu_data.stack_canary, canary);
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#else
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this_cpu_write(stack_canary.canary, canary);
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this_cpu_write(__stack_chk_guard, canary);
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#endif
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}
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@ -95,48 +80,16 @@ static inline void cpu_init_stack_canary(int cpu, struct task_struct *idle)
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#ifdef CONFIG_X86_64
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per_cpu(fixed_percpu_data.stack_canary, cpu) = idle->stack_canary;
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#else
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per_cpu(stack_canary.canary, cpu) = idle->stack_canary;
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#endif
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}
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static inline void setup_stack_canary_segment(int cpu)
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{
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#ifdef CONFIG_X86_32
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unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu);
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struct desc_struct *gdt_table = get_cpu_gdt_rw(cpu);
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struct desc_struct desc;
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desc = gdt_table[GDT_ENTRY_STACK_CANARY];
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set_desc_base(&desc, canary);
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write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
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#endif
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}
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static inline void load_stack_canary_segment(void)
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{
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#ifdef CONFIG_X86_32
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asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
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per_cpu(__stack_chk_guard, cpu) = idle->stack_canary;
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#endif
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}
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#else /* STACKPROTECTOR */
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#define GDT_STACK_CANARY_INIT
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/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
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static inline void setup_stack_canary_segment(int cpu)
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{ }
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static inline void cpu_init_stack_canary(int cpu, struct task_struct *idle)
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{ }
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static inline void load_stack_canary_segment(void)
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{
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#ifdef CONFIG_X86_32
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asm volatile ("mov %0, %%gs" : : "r" (0));
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#endif
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}
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#endif /* STACKPROTECTOR */
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#endif /* _ASM_STACKPROTECTOR_H */
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@ -13,12 +13,10 @@
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/* image of the saved processor state */
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struct saved_context {
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/*
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* On x86_32, all segment registers, with the possible exception of
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* gs, are saved at kernel entry in pt_regs.
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* On x86_32, all segment registers except gs are saved at kernel
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* entry in pt_regs.
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*/
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#ifdef CONFIG_X86_32_LAZY_GS
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u16 gs;
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#endif
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unsigned long cr0, cr2, cr3, cr4;
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u64 misc_enable;
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bool misc_enable_saved;
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@ -53,11 +53,6 @@ void foo(void)
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offsetof(struct cpu_entry_area, tss.x86_tss.sp1) -
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offsetofend(struct cpu_entry_area, entry_stack_page.stack));
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#ifdef CONFIG_STACKPROTECTOR
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BLANK();
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OFFSET(stack_canary_offset, stack_canary, canary);
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#endif
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BLANK();
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DEFINE(EFI_svam, offsetof(efi_runtime_services_t, set_virtual_address_map));
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}
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@ -161,7 +161,6 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
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[GDT_ENTRY_ESPFIX_SS] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
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[GDT_ENTRY_PERCPU] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
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GDT_STACK_CANARY_INIT
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#endif
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} };
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EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
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@ -599,7 +598,6 @@ void load_percpu_segment(int cpu)
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__loadsegment_simple(gs, 0);
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wrmsrl(MSR_GS_BASE, cpu_kernelmode_gs_base(cpu));
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#endif
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load_stack_canary_segment();
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}
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#ifdef CONFIG_X86_32
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@ -1796,7 +1794,8 @@ DEFINE_PER_CPU(unsigned long, cpu_current_top_of_stack) =
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EXPORT_PER_CPU_SYMBOL(cpu_current_top_of_stack);
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#ifdef CONFIG_STACKPROTECTOR
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DEFINE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
|
||||
DEFINE_PER_CPU(unsigned long, __stack_chk_guard);
|
||||
EXPORT_PER_CPU_SYMBOL(__stack_chk_guard);
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
|
|
|||
|
|
@ -100,9 +100,7 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct doublefault_stack, doublefault_stack) = {
|
|||
.ss = __KERNEL_DS,
|
||||
.ds = __USER_DS,
|
||||
.fs = __KERNEL_PERCPU,
|
||||
#ifndef CONFIG_X86_32_LAZY_GS
|
||||
.gs = __KERNEL_STACK_CANARY,
|
||||
#endif
|
||||
.gs = 0,
|
||||
|
||||
.__cr3 = __pa_nodebug(swapper_pg_dir),
|
||||
},
|
||||
|
|
|
|||
|
|
@ -318,8 +318,8 @@ SYM_FUNC_START(startup_32_smp)
|
|||
movl $(__KERNEL_PERCPU), %eax
|
||||
movl %eax,%fs # set this cpu's percpu
|
||||
|
||||
movl $(__KERNEL_STACK_CANARY),%eax
|
||||
movl %eax,%gs
|
||||
xorl %eax,%eax
|
||||
movl %eax,%gs # clear possible garbage in %gs
|
||||
|
||||
xorl %eax,%eax # Clear LDT
|
||||
lldt %ax
|
||||
|
|
@ -339,20 +339,6 @@ SYM_FUNC_END(startup_32_smp)
|
|||
*/
|
||||
__INIT
|
||||
setup_once:
|
||||
#ifdef CONFIG_STACKPROTECTOR
|
||||
/*
|
||||
* Configure the stack canary. The linker can't handle this by
|
||||
* relocation. Manually set base address in stack canary
|
||||
* segment descriptor.
|
||||
*/
|
||||
movl $gdt_page,%eax
|
||||
movl $stack_canary,%ecx
|
||||
movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
|
||||
shrl $16, %ecx
|
||||
movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
|
||||
movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
|
||||
#endif
|
||||
|
||||
andl $0,setup_once_ref /* Once is enough, thanks */
|
||||
ret
|
||||
|
||||
|
|
|
|||
|
|
@ -224,7 +224,6 @@ void __init setup_per_cpu_areas(void)
|
|||
per_cpu(this_cpu_off, cpu) = per_cpu_offset(cpu);
|
||||
per_cpu(cpu_number, cpu) = cpu;
|
||||
setup_percpu_segment(cpu);
|
||||
setup_stack_canary_segment(cpu);
|
||||
/*
|
||||
* Copy data used in early init routines from the
|
||||
* initial arrays to the per cpu data areas. These
|
||||
|
|
|
|||
|
|
@ -164,17 +164,11 @@ int do_set_thread_area(struct task_struct *p, int idx,
|
|||
savesegment(fs, sel);
|
||||
if (sel == modified_sel)
|
||||
loadsegment(fs, sel);
|
||||
#endif
|
||||
|
||||
savesegment(gs, sel);
|
||||
if (sel == modified_sel)
|
||||
load_gs_index(sel);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_32_LAZY_GS
|
||||
savesegment(gs, sel);
|
||||
if (sel == modified_sel)
|
||||
loadsegment(gs, sel);
|
||||
#endif
|
||||
} else {
|
||||
#ifdef CONFIG_X86_64
|
||||
if (p->thread.fsindex == modified_sel)
|
||||
|
|
|
|||
|
|
@ -404,10 +404,6 @@ static short get_segment_selector(struct pt_regs *regs, int seg_reg_idx)
|
|||
case INAT_SEG_REG_FS:
|
||||
return (unsigned short)(regs->fs & 0xffff);
|
||||
case INAT_SEG_REG_GS:
|
||||
/*
|
||||
* GS may or may not be in regs as per CONFIG_X86_32_LAZY_GS.
|
||||
* The macro below takes care of both cases.
|
||||
*/
|
||||
return get_user_gs(regs);
|
||||
case INAT_SEG_REG_IGNORE:
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -46,10 +46,8 @@
|
|||
|
||||
#define PVH_GDT_ENTRY_CS 1
|
||||
#define PVH_GDT_ENTRY_DS 2
|
||||
#define PVH_GDT_ENTRY_CANARY 3
|
||||
#define PVH_CS_SEL (PVH_GDT_ENTRY_CS * 8)
|
||||
#define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8)
|
||||
#define PVH_CANARY_SEL (PVH_GDT_ENTRY_CANARY * 8)
|
||||
|
||||
SYM_CODE_START_LOCAL(pvh_start_xen)
|
||||
cld
|
||||
|
|
@ -111,17 +109,6 @@ SYM_CODE_START_LOCAL(pvh_start_xen)
|
|||
|
||||
#else /* CONFIG_X86_64 */
|
||||
|
||||
/* Set base address in stack canary descriptor. */
|
||||
movl $_pa(gdt_start),%eax
|
||||
movl $_pa(canary),%ecx
|
||||
movw %cx, (PVH_GDT_ENTRY_CANARY * 8) + 2(%eax)
|
||||
shrl $16, %ecx
|
||||
movb %cl, (PVH_GDT_ENTRY_CANARY * 8) + 4(%eax)
|
||||
movb %ch, (PVH_GDT_ENTRY_CANARY * 8) + 7(%eax)
|
||||
|
||||
mov $PVH_CANARY_SEL,%eax
|
||||
mov %eax,%gs
|
||||
|
||||
call mk_early_pgtbl_32
|
||||
|
||||
mov $_pa(initial_page_table), %eax
|
||||
|
|
@ -165,7 +152,6 @@ SYM_DATA_START_LOCAL(gdt_start)
|
|||
.quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* PVH_CS_SEL */
|
||||
#endif
|
||||
.quad GDT_ENTRY(0xc092, 0, 0xfffff) /* PVH_DS_SEL */
|
||||
.quad GDT_ENTRY(0x4090, 0, 0x18) /* PVH_CANARY_SEL */
|
||||
SYM_DATA_END_LABEL(gdt_start, SYM_L_LOCAL, gdt_end)
|
||||
|
||||
.balign 16
|
||||
|
|
|
|||
|
|
@ -99,11 +99,8 @@ static void __save_processor_state(struct saved_context *ctxt)
|
|||
/*
|
||||
* segment registers
|
||||
*/
|
||||
#ifdef CONFIG_X86_32_LAZY_GS
|
||||
savesegment(gs, ctxt->gs);
|
||||
#endif
|
||||
#ifdef CONFIG_X86_64
|
||||
savesegment(gs, ctxt->gs);
|
||||
savesegment(fs, ctxt->fs);
|
||||
savesegment(ds, ctxt->ds);
|
||||
savesegment(es, ctxt->es);
|
||||
|
|
@ -232,7 +229,6 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)
|
|||
wrmsrl(MSR_GS_BASE, ctxt->kernelmode_gs_base);
|
||||
#else
|
||||
loadsegment(fs, __KERNEL_PERCPU);
|
||||
loadsegment(gs, __KERNEL_STACK_CANARY);
|
||||
#endif
|
||||
|
||||
/* Restore the TSS, RO GDT, LDT, and usermode-relevant MSRs. */
|
||||
|
|
@ -255,7 +251,7 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)
|
|||
*/
|
||||
wrmsrl(MSR_FS_BASE, ctxt->fs_base);
|
||||
wrmsrl(MSR_KERNEL_GS_BASE, ctxt->usermode_gs_base);
|
||||
#elif defined(CONFIG_X86_32_LAZY_GS)
|
||||
#else
|
||||
loadsegment(gs, ctxt->gs);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1204,7 +1204,6 @@ static void __init xen_setup_gdt(int cpu)
|
|||
pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
|
||||
pv_ops.cpu.load_gdt = xen_load_gdt_boot;
|
||||
|
||||
setup_stack_canary_segment(cpu);
|
||||
switch_to_new_gdt(cpu);
|
||||
|
||||
pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,8 @@
|
|||
#!/bin/sh
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
echo "int foo(void) { char X[200]; return 3; }" | $* -S -x c -c -m32 -O0 -fstack-protector - -o - 2> /dev/null | grep -q "%gs"
|
||||
# This requires GCC 8.1 or better. Specifically, we require
|
||||
# -mstack-protector-guard-reg, added by
|
||||
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81708
|
||||
|
||||
echo "int foo(void) { char X[200]; return 3; }" | $* -S -x c -c -m32 -O0 -fstack-protector -mstack-protector-guard-reg=fs -mstack-protector-guard-symbol=__stack_chk_guard - -o - 2> /dev/null | grep -q "%fs"
|
||||
|
|
|
|||
Loading…
Reference in New Issue