sfc: Eliminate indirect lookups of queue size constants
Move size and mask definitions into efx.h; calculate page orders in falcon.c. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
12d00cadcc
commit
3ffeabdd2b
drivers/net/sfc
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@ -290,7 +290,7 @@ void efx_process_channel_now(struct efx_channel *channel)
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napi_disable(&channel->napi_str);
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/* Poll the channel */
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efx_process_channel(channel, efx->type->evq_size);
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efx_process_channel(channel, EFX_EVQ_SIZE);
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/* Ack the eventq. This may cause an interrupt to be generated
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* when they are reenabled */
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@ -1981,17 +1981,9 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
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efx->type = type;
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/* Sanity-check NIC type */
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EFX_BUG_ON_PARANOID(efx->type->txd_ring_mask &
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(efx->type->txd_ring_mask + 1));
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EFX_BUG_ON_PARANOID(efx->type->rxd_ring_mask &
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(efx->type->rxd_ring_mask + 1));
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EFX_BUG_ON_PARANOID(efx->type->evq_size &
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(efx->type->evq_size - 1));
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/* As close as we can get to guaranteeing that we don't overflow */
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EFX_BUG_ON_PARANOID(efx->type->evq_size <
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(efx->type->txd_ring_mask + 1 +
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efx->type->rxd_ring_mask + 1));
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BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
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EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
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/* Higher numbered interrupt modes are less capable! */
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@ -25,16 +25,22 @@ extern netdev_tx_t efx_xmit(struct efx_nic *efx,
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struct sk_buff *skb);
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extern void efx_stop_queue(struct efx_nic *efx);
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extern void efx_wake_queue(struct efx_nic *efx);
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#define EFX_TXQ_SIZE 1024
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#define EFX_TXQ_MASK (EFX_TXQ_SIZE - 1)
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/* RX */
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extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
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extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
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unsigned int len, bool checksummed, bool discard);
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extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay);
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#define EFX_RXQ_SIZE 1024
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#define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1)
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/* Channels */
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extern void efx_process_channel_now(struct efx_channel *channel);
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extern void efx_flush_queues(struct efx_nic *efx);
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#define EFX_EVQ_SIZE 4096
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#define EFX_EVQ_MASK (EFX_EVQ_SIZE - 1)
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/* Ports */
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extern void efx_stats_disable(struct efx_nic *efx);
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@ -108,21 +108,6 @@ static int rx_xon_thresh_bytes = -1;
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module_param(rx_xon_thresh_bytes, int, 0644);
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MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold");
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/* TX descriptor ring size - min 512 max 4k */
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#define FALCON_TXD_RING_ORDER FFE_AZ_TX_DESCQ_SIZE_1K
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#define FALCON_TXD_RING_SIZE 1024
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#define FALCON_TXD_RING_MASK (FALCON_TXD_RING_SIZE - 1)
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/* RX descriptor ring size - min 512 max 4k */
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#define FALCON_RXD_RING_ORDER FFE_AZ_RX_DESCQ_SIZE_1K
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#define FALCON_RXD_RING_SIZE 1024
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#define FALCON_RXD_RING_MASK (FALCON_RXD_RING_SIZE - 1)
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/* Event queue size - max 32k */
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#define FALCON_EVQ_ORDER FFE_AZ_EVQ_SIZE_4K
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#define FALCON_EVQ_SIZE 4096
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#define FALCON_EVQ_MASK (FALCON_EVQ_SIZE - 1)
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/* If FALCON_MAX_INT_ERRORS internal errors occur within
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* FALCON_INT_ERROR_EXPIRE seconds, we consider the NIC broken and
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* disable it.
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@ -420,7 +405,7 @@ static inline void falcon_notify_tx_desc(struct efx_tx_queue *tx_queue)
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unsigned write_ptr;
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efx_dword_t reg;
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write_ptr = tx_queue->write_count & FALCON_TXD_RING_MASK;
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write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
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EFX_POPULATE_DWORD_1(reg, FRF_AZ_TX_DESC_WPTR_DWORD, write_ptr);
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efx_writed_page(tx_queue->efx, ®,
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FR_AZ_TX_DESC_UPD_DWORD_P0, tx_queue->queue);
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@ -441,7 +426,7 @@ void falcon_push_buffers(struct efx_tx_queue *tx_queue)
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BUG_ON(tx_queue->write_count == tx_queue->insert_count);
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do {
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write_ptr = tx_queue->write_count & FALCON_TXD_RING_MASK;
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write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
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buffer = &tx_queue->buffer[write_ptr];
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txd = falcon_tx_desc(tx_queue, write_ptr);
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++tx_queue->write_count;
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@ -462,9 +447,10 @@ void falcon_push_buffers(struct efx_tx_queue *tx_queue)
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int falcon_probe_tx(struct efx_tx_queue *tx_queue)
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{
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struct efx_nic *efx = tx_queue->efx;
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BUILD_BUG_ON(EFX_TXQ_SIZE < 512 || EFX_TXQ_SIZE > 4096 ||
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EFX_TXQ_SIZE & EFX_TXQ_MASK);
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return falcon_alloc_special_buffer(efx, &tx_queue->txd,
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FALCON_TXD_RING_SIZE *
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sizeof(efx_qword_t));
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EFX_TXQ_SIZE * sizeof(efx_qword_t));
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}
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void falcon_init_tx(struct efx_tx_queue *tx_queue)
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@ -487,7 +473,8 @@ void falcon_init_tx(struct efx_tx_queue *tx_queue)
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tx_queue->channel->channel,
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FRF_AZ_TX_DESCQ_OWNER_ID, 0,
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FRF_AZ_TX_DESCQ_LABEL, tx_queue->queue,
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FRF_AZ_TX_DESCQ_SIZE, FALCON_TXD_RING_ORDER,
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FRF_AZ_TX_DESCQ_SIZE,
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__ffs(tx_queue->txd.entries),
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FRF_AZ_TX_DESCQ_TYPE, 0,
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FRF_BZ_TX_NON_IP_DROP_DIS, 1);
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@ -592,12 +579,12 @@ void falcon_notify_rx_desc(struct efx_rx_queue *rx_queue)
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while (rx_queue->notified_count != rx_queue->added_count) {
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falcon_build_rx_desc(rx_queue,
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rx_queue->notified_count &
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FALCON_RXD_RING_MASK);
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EFX_RXQ_MASK);
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++rx_queue->notified_count;
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}
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wmb();
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write_ptr = rx_queue->added_count & FALCON_RXD_RING_MASK;
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write_ptr = rx_queue->added_count & EFX_RXQ_MASK;
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EFX_POPULATE_DWORD_1(reg, FRF_AZ_RX_DESC_WPTR_DWORD, write_ptr);
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efx_writed_page(rx_queue->efx, ®,
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FR_AZ_RX_DESC_UPD_DWORD_P0, rx_queue->queue);
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@ -606,9 +593,10 @@ void falcon_notify_rx_desc(struct efx_rx_queue *rx_queue)
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int falcon_probe_rx(struct efx_rx_queue *rx_queue)
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{
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struct efx_nic *efx = rx_queue->efx;
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BUILD_BUG_ON(EFX_RXQ_SIZE < 512 || EFX_RXQ_SIZE > 4096 ||
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EFX_RXQ_SIZE & EFX_RXQ_MASK);
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return falcon_alloc_special_buffer(efx, &rx_queue->rxd,
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FALCON_RXD_RING_SIZE *
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sizeof(efx_qword_t));
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EFX_RXQ_SIZE * sizeof(efx_qword_t));
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}
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void falcon_init_rx(struct efx_rx_queue *rx_queue)
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@ -636,7 +624,8 @@ void falcon_init_rx(struct efx_rx_queue *rx_queue)
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rx_queue->channel->channel,
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FRF_AZ_RX_DESCQ_OWNER_ID, 0,
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FRF_AZ_RX_DESCQ_LABEL, rx_queue->queue,
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FRF_AZ_RX_DESCQ_SIZE, FALCON_RXD_RING_ORDER,
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FRF_AZ_RX_DESCQ_SIZE,
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__ffs(rx_queue->rxd.entries),
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FRF_AZ_RX_DESCQ_TYPE, 0 /* kernel queue */ ,
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/* For >=B0 this is scatter so disable */
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FRF_AZ_RX_DESCQ_JUMBO, !is_b0,
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@ -741,7 +730,7 @@ static void falcon_handle_tx_event(struct efx_channel *channel,
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tx_queue = &efx->tx_queue[tx_ev_q_label];
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channel->irq_mod_score +=
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(tx_ev_desc_ptr - tx_queue->read_count) &
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efx->type->txd_ring_mask;
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EFX_TXQ_MASK;
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efx_xmit_done(tx_queue, tx_ev_desc_ptr);
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} else if (EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_WQ_FF_FULL)) {
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/* Rewrite the FIFO write pointer */
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@ -848,9 +837,8 @@ static void falcon_handle_rx_bad_index(struct efx_rx_queue *rx_queue,
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struct efx_nic *efx = rx_queue->efx;
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unsigned expected, dropped;
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expected = rx_queue->removed_count & FALCON_RXD_RING_MASK;
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dropped = ((index + FALCON_RXD_RING_SIZE - expected) &
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FALCON_RXD_RING_MASK);
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expected = rx_queue->removed_count & EFX_RXQ_MASK;
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dropped = (index - expected) & EFX_RXQ_MASK;
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EFX_INFO(efx, "dropped %d events (index=%d expected=%d)\n",
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dropped, index, expected);
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@ -887,7 +875,7 @@ static void falcon_handle_rx_event(struct efx_channel *channel,
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rx_queue = &efx->rx_queue[channel->channel];
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rx_ev_desc_ptr = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_DESC_PTR);
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expected_ptr = rx_queue->removed_count & FALCON_RXD_RING_MASK;
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expected_ptr = rx_queue->removed_count & EFX_RXQ_MASK;
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if (unlikely(rx_ev_desc_ptr != expected_ptr))
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falcon_handle_rx_bad_index(rx_queue, rx_ev_desc_ptr);
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@ -1075,7 +1063,7 @@ int falcon_process_eventq(struct efx_channel *channel, int rx_quota)
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}
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/* Increment read pointer */
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read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
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read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
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} while (rx_packets < rx_quota);
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@ -1120,10 +1108,10 @@ void falcon_set_int_moderation(struct efx_channel *channel)
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int falcon_probe_eventq(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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unsigned int evq_size;
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evq_size = FALCON_EVQ_SIZE * sizeof(efx_qword_t);
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return falcon_alloc_special_buffer(efx, &channel->eventq, evq_size);
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BUILD_BUG_ON(EFX_EVQ_SIZE < 512 || EFX_EVQ_SIZE > 32768 ||
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EFX_EVQ_SIZE & EFX_EVQ_MASK);
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return falcon_alloc_special_buffer(efx, &channel->eventq,
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EFX_EVQ_SIZE * sizeof(efx_qword_t));
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}
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void falcon_init_eventq(struct efx_channel *channel)
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@ -1144,7 +1132,7 @@ void falcon_init_eventq(struct efx_channel *channel)
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/* Push event queue to card */
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EFX_POPULATE_OWORD_3(evq_ptr,
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FRF_AZ_EVQ_EN, 1,
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FRF_AZ_EVQ_SIZE, FALCON_EVQ_ORDER,
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FRF_AZ_EVQ_SIZE, __ffs(channel->eventq.entries),
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FRF_AZ_EVQ_BUF_BASE_ID, channel->eventq.index);
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efx_writeo_table(efx, &evq_ptr, efx->type->evq_ptr_tbl_base,
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channel->channel);
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@ -1214,7 +1202,7 @@ static void falcon_poll_flush_events(struct efx_nic *efx)
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struct efx_tx_queue *tx_queue;
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struct efx_rx_queue *rx_queue;
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unsigned int read_ptr = channel->eventq_read_ptr;
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unsigned int end_ptr = (read_ptr - 1) & FALCON_EVQ_MASK;
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unsigned int end_ptr = (read_ptr - 1) & EFX_EVQ_MASK;
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do {
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efx_qword_t *event = falcon_event(channel, read_ptr);
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@ -1252,7 +1240,7 @@ static void falcon_poll_flush_events(struct efx_nic *efx)
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}
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}
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read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK;
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read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
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} while (read_ptr != end_ptr);
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}
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@ -3160,9 +3148,6 @@ struct efx_nic_type falcon_a_nic_type = {
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.buf_tbl_base = FR_AA_BUF_FULL_TBL_KER,
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.evq_ptr_tbl_base = FR_AA_EVQ_PTR_TBL_KER,
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.evq_rptr_tbl_base = FR_AA_EVQ_RPTR_KER,
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.txd_ring_mask = FALCON_TXD_RING_MASK,
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.rxd_ring_mask = FALCON_RXD_RING_MASK,
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.evq_size = FALCON_EVQ_SIZE,
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.max_dma_mask = FALCON_DMA_MASK,
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.tx_dma_mask = FALCON_TX_DMA_MASK,
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.bug5391_mask = 0xf,
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@ -3184,9 +3169,6 @@ struct efx_nic_type falcon_b_nic_type = {
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.buf_tbl_base = FR_BZ_BUF_FULL_TBL,
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.evq_ptr_tbl_base = FR_BZ_EVQ_PTR_TBL,
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.evq_rptr_tbl_base = FR_BZ_EVQ_RPTR,
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.txd_ring_mask = FALCON_TXD_RING_MASK,
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.rxd_ring_mask = FALCON_RXD_RING_MASK,
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.evq_size = FALCON_EVQ_SIZE,
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.max_dma_mask = FALCON_DMA_MASK,
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.tx_dma_mask = FALCON_TX_DMA_MASK,
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.bug5391_mask = 0,
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@ -869,9 +869,6 @@ static inline const char *efx_dev_name(struct efx_nic *efx)
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* @buf_tbl_base: Buffer table base address
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* @evq_ptr_tbl_base: Event queue pointer table base address
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* @evq_rptr_tbl_base: Event queue read-pointer table base address
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* @txd_ring_mask: TX descriptor ring size - 1 (must be a power of two - 1)
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* @rxd_ring_mask: RX descriptor ring size - 1 (must be a power of two - 1)
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* @evq_size: Event queue size (must be a power of two)
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* @max_dma_mask: Maximum possible DMA mask
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* @tx_dma_mask: TX DMA mask
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* @bug5391_mask: Address mask for bug 5391 workaround
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@ -890,9 +887,6 @@ struct efx_nic_type {
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unsigned int evq_ptr_tbl_base;
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unsigned int evq_rptr_tbl_base;
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unsigned int txd_ring_mask;
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unsigned int rxd_ring_mask;
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unsigned int evq_size;
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u64 max_dma_mask;
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unsigned int tx_dma_mask;
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unsigned bug5391_mask;
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@ -293,8 +293,7 @@ static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue,
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* fill anyway.
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*/
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fill_level = (rx_queue->added_count - rx_queue->removed_count);
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EFX_BUG_ON_PARANOID(fill_level >
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rx_queue->efx->type->rxd_ring_mask + 1);
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EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
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/* Don't fill if we don't need to */
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if (fill_level >= rx_queue->fast_fill_trigger)
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@ -316,8 +315,7 @@ static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue,
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retry:
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/* Recalculate current fill level now that we have the lock */
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fill_level = (rx_queue->added_count - rx_queue->removed_count);
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EFX_BUG_ON_PARANOID(fill_level >
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rx_queue->efx->type->rxd_ring_mask + 1);
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EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
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space = rx_queue->fast_fill_limit - fill_level;
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if (space < EFX_RX_BATCH)
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goto out_unlock;
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@ -329,8 +327,7 @@ static int __efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue,
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do {
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for (i = 0; i < EFX_RX_BATCH; ++i) {
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index = (rx_queue->added_count &
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rx_queue->efx->type->rxd_ring_mask);
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index = rx_queue->added_count & EFX_RXQ_MASK;
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rx_buf = efx_rx_buffer(rx_queue, index);
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rc = efx_init_rx_buffer(rx_queue, rx_buf);
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if (unlikely(rc))
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@ -629,7 +626,7 @@ int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
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EFX_LOG(efx, "creating RX queue %d\n", rx_queue->queue);
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/* Allocate RX buffers */
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rxq_size = (efx->type->rxd_ring_mask + 1) * sizeof(*rx_queue->buffer);
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rxq_size = EFX_RXQ_SIZE * sizeof(*rx_queue->buffer);
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rx_queue->buffer = kzalloc(rxq_size, GFP_KERNEL);
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if (!rx_queue->buffer)
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return -ENOMEM;
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@ -644,7 +641,6 @@ int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
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void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
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{
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struct efx_nic *efx = rx_queue->efx;
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unsigned int max_fill, trigger, limit;
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EFX_LOG(rx_queue->efx, "initialising RX queue %d\n", rx_queue->queue);
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@ -657,7 +653,7 @@ void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
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rx_queue->min_overfill = -1U;
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/* Initialise limit fields */
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max_fill = efx->type->rxd_ring_mask + 1 - EFX_RXD_HEAD_ROOM;
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max_fill = EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM;
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trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
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limit = max_fill * min(rx_refill_limit, 100U) / 100U;
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@ -680,7 +676,7 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
|
|||
|
||||
/* Release RX buffers NB start at index 0 not current HW ptr */
|
||||
if (rx_queue->buffer) {
|
||||
for (i = 0; i <= rx_queue->efx->type->rxd_ring_mask; i++) {
|
||||
for (i = 0; i <= EFX_RXQ_MASK; i++) {
|
||||
rx_buf = efx_rx_buffer(rx_queue, i);
|
||||
efx_fini_rx_buffer(rx_queue, rx_buf);
|
||||
}
|
||||
|
|
|
@ -526,7 +526,7 @@ efx_test_loopback(struct efx_tx_queue *tx_queue,
|
|||
|
||||
for (i = 0; i < 3; i++) {
|
||||
/* Determine how many packets to send */
|
||||
state->packet_count = (efx->type->txd_ring_mask + 1) / 3;
|
||||
state->packet_count = EFX_TXQ_SIZE / 3;
|
||||
state->packet_count = min(1 << (i << 2), state->packet_count);
|
||||
state->skbs = kzalloc(sizeof(state->skbs[0]) *
|
||||
state->packet_count, GFP_KERNEL);
|
||||
|
|
|
@ -26,8 +26,7 @@
|
|||
* The tx_queue descriptor ring fill-level must fall below this value
|
||||
* before we restart the netif queue
|
||||
*/
|
||||
#define EFX_NETDEV_TX_THRESHOLD(_tx_queue) \
|
||||
(_tx_queue->efx->type->txd_ring_mask / 2u)
|
||||
#define EFX_TXQ_THRESHOLD (EFX_TXQ_MASK / 2u)
|
||||
|
||||
/* We want to be able to nest calls to netif_stop_queue(), since each
|
||||
* channel can have an individual stop on the queue.
|
||||
|
@ -171,7 +170,7 @@ static netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue,
|
|||
}
|
||||
|
||||
fill_level = tx_queue->insert_count - tx_queue->old_read_count;
|
||||
q_space = efx->type->txd_ring_mask - 1 - fill_level;
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
|
||||
/* Map for DMA. Use pci_map_single rather than pci_map_page
|
||||
* since this is more efficient on machines with sparse
|
||||
|
@ -208,16 +207,14 @@ static netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue,
|
|||
&tx_queue->read_count;
|
||||
fill_level = (tx_queue->insert_count
|
||||
- tx_queue->old_read_count);
|
||||
q_space = (efx->type->txd_ring_mask - 1 -
|
||||
fill_level);
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
if (unlikely(q_space-- <= 0))
|
||||
goto stop;
|
||||
smp_mb();
|
||||
--tx_queue->stopped;
|
||||
}
|
||||
|
||||
insert_ptr = (tx_queue->insert_count &
|
||||
efx->type->txd_ring_mask);
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->tsoh);
|
||||
|
@ -289,7 +286,7 @@ static netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue,
|
|||
/* Work backwards until we hit the original insert pointer value */
|
||||
while (tx_queue->insert_count != tx_queue->write_count) {
|
||||
--tx_queue->insert_count;
|
||||
insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
efx_dequeue_buffer(tx_queue, buffer);
|
||||
buffer->len = 0;
|
||||
|
@ -318,10 +315,9 @@ static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
|
|||
{
|
||||
struct efx_nic *efx = tx_queue->efx;
|
||||
unsigned int stop_index, read_ptr;
|
||||
unsigned int mask = tx_queue->efx->type->txd_ring_mask;
|
||||
|
||||
stop_index = (index + 1) & mask;
|
||||
read_ptr = tx_queue->read_count & mask;
|
||||
stop_index = (index + 1) & EFX_TXQ_MASK;
|
||||
read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
|
||||
|
||||
while (read_ptr != stop_index) {
|
||||
struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
|
||||
|
@ -338,7 +334,7 @@ static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
|
|||
buffer->len = 0;
|
||||
|
||||
++tx_queue->read_count;
|
||||
read_ptr = tx_queue->read_count & mask;
|
||||
read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -391,7 +387,7 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
|
|||
unsigned fill_level;
|
||||
struct efx_nic *efx = tx_queue->efx;
|
||||
|
||||
EFX_BUG_ON_PARANOID(index > efx->type->txd_ring_mask);
|
||||
EFX_BUG_ON_PARANOID(index > EFX_TXQ_MASK);
|
||||
|
||||
efx_dequeue_buffers(tx_queue, index);
|
||||
|
||||
|
@ -401,7 +397,7 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
|
|||
smp_mb();
|
||||
if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
|
||||
fill_level = tx_queue->insert_count - tx_queue->read_count;
|
||||
if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) {
|
||||
if (fill_level < EFX_TXQ_THRESHOLD) {
|
||||
EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
|
||||
|
||||
/* Do this under netif_tx_lock(), to avoid racing
|
||||
|
@ -425,11 +421,11 @@ int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
|
|||
EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
|
||||
|
||||
/* Allocate software ring */
|
||||
txq_size = (efx->type->txd_ring_mask + 1) * sizeof(*tx_queue->buffer);
|
||||
txq_size = EFX_TXQ_SIZE * sizeof(*tx_queue->buffer);
|
||||
tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
|
||||
if (!tx_queue->buffer)
|
||||
return -ENOMEM;
|
||||
for (i = 0; i <= efx->type->txd_ring_mask; ++i)
|
||||
for (i = 0; i <= EFX_TXQ_MASK; ++i)
|
||||
tx_queue->buffer[i].continuation = true;
|
||||
|
||||
/* Allocate hardware ring */
|
||||
|
@ -468,8 +464,7 @@ void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
|
|||
|
||||
/* Free any buffers left in the ring */
|
||||
while (tx_queue->read_count != tx_queue->write_count) {
|
||||
buffer = &tx_queue->buffer[tx_queue->read_count &
|
||||
tx_queue->efx->type->txd_ring_mask];
|
||||
buffer = &tx_queue->buffer[tx_queue->read_count & EFX_TXQ_MASK];
|
||||
efx_dequeue_buffer(tx_queue, buffer);
|
||||
buffer->continuation = true;
|
||||
buffer->len = 0;
|
||||
|
@ -715,7 +710,7 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
|||
|
||||
fill_level = tx_queue->insert_count - tx_queue->old_read_count;
|
||||
/* -1 as there is no way to represent all descriptors used */
|
||||
q_space = efx->type->txd_ring_mask - 1 - fill_level;
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
|
||||
while (1) {
|
||||
if (unlikely(q_space-- <= 0)) {
|
||||
|
@ -731,7 +726,7 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
|||
*(volatile unsigned *)&tx_queue->read_count;
|
||||
fill_level = (tx_queue->insert_count
|
||||
- tx_queue->old_read_count);
|
||||
q_space = efx->type->txd_ring_mask - 1 - fill_level;
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
if (unlikely(q_space-- <= 0)) {
|
||||
*final_buffer = NULL;
|
||||
return 1;
|
||||
|
@ -740,13 +735,13 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
|||
--tx_queue->stopped;
|
||||
}
|
||||
|
||||
insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
++tx_queue->insert_count;
|
||||
|
||||
EFX_BUG_ON_PARANOID(tx_queue->insert_count -
|
||||
tx_queue->read_count >
|
||||
efx->type->txd_ring_mask);
|
||||
EFX_TXQ_MASK);
|
||||
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->len);
|
||||
|
@ -792,8 +787,7 @@ static void efx_tso_put_header(struct efx_tx_queue *tx_queue,
|
|||
{
|
||||
struct efx_tx_buffer *buffer;
|
||||
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count &
|
||||
tx_queue->efx->type->txd_ring_mask];
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count & EFX_TXQ_MASK];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->len);
|
||||
EFX_BUG_ON_PARANOID(buffer->unmap_len);
|
||||
|
@ -818,7 +812,7 @@ static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
|
|||
while (tx_queue->insert_count != tx_queue->write_count) {
|
||||
--tx_queue->insert_count;
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count &
|
||||
tx_queue->efx->type->txd_ring_mask];
|
||||
EFX_TXQ_MASK];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->skb);
|
||||
buffer->len = 0;
|
||||
|
@ -1135,7 +1129,7 @@ static void efx_fini_tso(struct efx_tx_queue *tx_queue)
|
|||
unsigned i;
|
||||
|
||||
if (tx_queue->buffer) {
|
||||
for (i = 0; i <= tx_queue->efx->type->txd_ring_mask; ++i)
|
||||
for (i = 0; i <= EFX_TXQ_MASK; ++i)
|
||||
efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue