p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init() 

No functional change. Get device pointer at the beginning of
dw_pcie_host_init() instead of getting it all over dw_pcie_host_init().
This is in preparation for splitting struct pcie_port into host and core
structures (once split pcie_port will not have device pointer).

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Kishon Vijay Abraham I 2017-02-15 18:48:13 +05:30 committed by Bjorn Helgaas
parent 19ce01cc8c
commit 40f67fb2c3
1 changed files with 17 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/pci/dwc/pcie-designware.c
View File

@ -446,8 +446,9 @@ static u8 dw_pcie_iatu_unroll_enabled(struct pcie_port *pp)
int dw_pcie_host_init(struct pcie_port *pp) int dw_pcie_host_init(struct pcie_port *pp)
{ {
struct device_node *np = pp->dev->of_node; struct device *dev = pp->dev;
struct platform_device *pdev = to_platform_device(pp->dev); struct device_node *np = dev->of_node;
struct platform_device *pdev = to_platform_device(dev);
struct pci_bus *bus, *child; struct pci_bus *bus, *child;
struct resource *cfg_res; struct resource *cfg_res;
int i, ret; int i, ret;
@ -461,14 +462,14 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->cfg0_base = cfg_res->start; pp->cfg0_base = cfg_res->start;
pp->cfg1_base = cfg_res->start + pp->cfg0_size; pp->cfg1_base = cfg_res->start + pp->cfg0_size;
} else if (!pp->va_cfg0_base) { } else if (!pp->va_cfg0_base) {
dev_err(pp->dev, "missing *config* reg space\n"); dev_err(dev, "missing *config* reg space\n");
} }
ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base); ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
if (ret) if (ret)
return ret; return ret;
ret = devm_request_pci_bus_resources(&pdev->dev, &res); ret = devm_request_pci_bus_resources(dev, &res);
if (ret) if (ret)
goto error; goto error;
@ -478,7 +479,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
case IORESOURCE_IO: case IORESOURCE_IO:
ret = pci_remap_iospace(win->res, pp->io_base); ret = pci_remap_iospace(win->res, pp->io_base);
if (ret) { if (ret) {
dev_warn(pp->dev, "error %d: failed to map resource %pR\n", dev_warn(dev, "error %d: failed to map resource %pR\n",
ret, win->res); ret, win->res);
resource_list_destroy_entry(win); resource_list_destroy_entry(win);
} else { } else {
@ -508,10 +509,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
} }
if (!pp->dbi_base) { if (!pp->dbi_base) {
pp->dbi_base = devm_ioremap(pp->dev, pp->cfg->start, pp->dbi_base = devm_ioremap(dev, pp->cfg->start,
resource_size(pp->cfg)); resource_size(pp->cfg));
if (!pp->dbi_base) { if (!pp->dbi_base) {
dev_err(pp->dev, "error with ioremap\n"); dev_err(dev, "error with ioremap\n");
ret = -ENOMEM; ret = -ENOMEM;
goto error; goto error;
} }
@ -520,20 +521,20 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->mem_base = pp->mem->start; pp->mem_base = pp->mem->start;
if (!pp->va_cfg0_base) { if (!pp->va_cfg0_base) {
pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base, pp->va_cfg0_base = devm_ioremap(dev, pp->cfg0_base,
pp->cfg0_size); pp->cfg0_size);
if (!pp->va_cfg0_base) { if (!pp->va_cfg0_base) {
dev_err(pp->dev, "error with ioremap in function\n"); dev_err(dev, "error with ioremap in function\n");
ret = -ENOMEM; ret = -ENOMEM;
goto error; goto error;
} }
} }
if (!pp->va_cfg1_base) { if (!pp->va_cfg1_base) {
pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base, pp->va_cfg1_base = devm_ioremap(dev, pp->cfg1_base,
pp->cfg1_size); pp->cfg1_size);
if (!pp->va_cfg1_base) { if (!pp->va_cfg1_base) {
dev_err(pp->dev, "error with ioremap\n"); dev_err(dev, "error with ioremap\n");
ret = -ENOMEM; ret = -ENOMEM;
goto error; goto error;
} }
@ -549,11 +550,11 @@ int dw_pcie_host_init(struct pcie_port *pp)
if (IS_ENABLED(CONFIG_PCI_MSI)) { if (IS_ENABLED(CONFIG_PCI_MSI)) {
if (!pp->ops->msi_host_init) { if (!pp->ops->msi_host_init) {
pp->irq_domain = irq_domain_add_linear(pp->dev->of_node, pp->irq_domain = irq_domain_add_linear(dev->of_node,
MAX_MSI_IRQS, &msi_domain_ops, MAX_MSI_IRQS, &msi_domain_ops,
&dw_pcie_msi_chip); &dw_pcie_msi_chip);
if (!pp->irq_domain) { if (!pp->irq_domain) {
dev_err(pp->dev, "irq domain init failed\n"); dev_err(dev, "irq domain init failed\n");
ret = -ENXIO; ret = -ENXIO;
goto error; goto error;
} }
@ -572,12 +573,12 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->root_bus_nr = pp->busn->start; pp->root_bus_nr = pp->busn->start;
if (IS_ENABLED(CONFIG_PCI_MSI)) { if (IS_ENABLED(CONFIG_PCI_MSI)) {
bus = pci_scan_root_bus_msi(pp->dev, pp->root_bus_nr, bus = pci_scan_root_bus_msi(dev, pp->root_bus_nr,
&dw_pcie_ops, pp, &res, &dw_pcie_ops, pp, &res,
&dw_pcie_msi_chip); &dw_pcie_msi_chip);
dw_pcie_msi_chip.dev = pp->dev; dw_pcie_msi_chip.dev = dev;
} else } else
bus = pci_scan_root_bus(pp->dev, pp->root_bus_nr, &dw_pcie_ops, bus = pci_scan_root_bus(dev, pp->root_bus_nr, &dw_pcie_ops,
pp, &res); pp, &res);
if (!bus) { if (!bus) {
ret = -ENOMEM; ret = -ENOMEM;